| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/wishbone/ |
| H A D | axi_stream_to_wb.v | 47 output tx_tvalid, port
225 if (tx_tready && tx_tvalid) begin
252 assign tx_tvalid = (tx_state == TX_STATE_WRITE);
255 assign enb_out = (tx_state == TX_STATE_WRITE)? (tx_tvalid && tx_tready) : 1'b1;
262 tx_state, tx_tlast, tx_tvalid, tx_tready, tx_tuser[2:0], //8
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| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/b2xxmini/ |
| H A D | b205.v | 210 wire ctrl_tvalid, resp_tvalid, rx_tvalid, tx_tvalid; net
253 .tx_tdata(tx_tdata), .tx_tlast(tx_tlast), .tx_tvalid(tx_tvalid), .tx_tready(tx_tready),
290 .tx_tdata(tx_tdata), .tx_tlast(tx_tlast), .tx_tvalid(tx_tvalid), .tx_tready(tx_tready),
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| H A D | b205_core.v | 31 input [63:0] tx_tdata, input tx_tlast, input tx_tvalid, output tx_tready, port
242 .tx_tdata(tx_tdata), .tx_tlast(tx_tlast), .tx_tvalid(tx_tvalid), .tx_tready(tx_tready),
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| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/fifo/ |
| H A D | fifo64_to_axi4lite.v | 50 wire tx_tvalid; net
65 .i_tvalid(tx_tvalid),
127 .axi_str_txd_tvalid(tx_tvalid),
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| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/b200/ |
| H A D | b200.v | 245 wire ctrl_tvalid, resp_tvalid, rx_tvalid, tx_tvalid; net
287 .tx_tdata(tx_tdata), .tx_tlast(tx_tlast), .tx_tvalid(tx_tvalid), .tx_tready(tx_tready),
352 .tx_tdata(tx_tdata), .tx_tlast(tx_tlast), .tx_tvalid(tx_tvalid), .tx_tready(tx_tready),
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| H A D | b200_core.v | 33 input [63:0] tx_tdata, input tx_tlast, input tx_tvalid, output tx_tready, port
278 .i_tdata({tx_tlast, tx_tdata}), .i_tvalid(tx_tvalid), .i_tready(tx_tready),
317 ….tx_tdata(r0_tx_tdata), .tx_tlast(r0_tx_tlast), .tx_tvalid(r0_tx_tvalid), .tx_tready(r0_tx_tready),
349 ….tx_tdata(r1_tx_tdata), .tx_tlast(r1_tx_tlast), .tx_tvalid(r1_tx_tvalid), .tx_tready(r1_tx_tready),
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| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/xge_interface/ |
| H A D | xge_mac_wrapper.v | 51 input tx_tvalid, port
350 .s_axis_tvalid(tx_tvalid),
369 assign tx_tvalid_int = tx_tvalid;
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| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/simple_gemac/ |
| H A D | gmii_to_axis.v | 40 input tx_tvalid, port
193 .s_axis_tvalid(tx_tvalid),
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| H A D | simple_gemac_wrapper.v | 21 input [63:0] tx_tdata, input [3:0] tx_tuser, input tx_tlast, input tx_tvalid, output tx_tready, port
125 .s_aclk(sys_clk), .s_axis_tvalid(tx_tvalid), .s_axis_tready(tx_tready),
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| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/n3xx/sim/ten_gig_eth_loopback/ |
| H A D | ten_gig_eth_loopback_tb.sv | 209 .tx_tvalid(m_tx_chdr.axis.tvalid),
308 .tx_tvalid(loop_tvalid),
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| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/n3xx/sim/one_gig_eth_loopback/ |
| H A D | one_gig_eth_loopback_tb.sv | 178 .tx_tvalid(m_tx_chdr.axis.tvalid),
241 .tx_tvalid(loop_tvalid),
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| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/gpif2/ |
| H A D | gpif2_slave_fifo32.v | 44 output [63:0] tx_tdata, output tx_tlast, output tx_tvalid, input tx_tready, port
487 .o_tdata(tx_tdata), .o_tlast(tx_tlast), .o_tvalid(tx_tvalid), .o_tready(tx_tready),
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| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/x300/ |
| H A D | soft_ctrl.v | 71 output tx_tvalid, port
276 ….o_aclk(clk), .o_tdata({tx_tdata, tx_tuser, tx_tlast}), .o_tvalid(tx_tvalid), .o_tready(tx_tready)…
292 .tx_tvalid(tx_tvalid_div2), .tx_tready(tx_tready_div2),
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| H A D | x300_sfpp_io_core.v | 182 .tx_tvalid(c2mac_tvalid),
261 .tx_tvalid(c2mac_tvalid),
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| H A D | bus_int.v | 295 .tx_tvalid(zpuo_tvalid),
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| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/n3xx/sim/arm_to_sfp_loopback/ |
| H A D | arm_to_sfp_tb.sv | 196 .tx_tvalid(c2e_tvalid),
309 .tx_tvalid(loop_tvalid),
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| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/e320/ |
| H A D | n3xx_mgt_io_core.v | 334 .tx_tvalid(c2mac_tvalid),
433 .tx_tvalid(c2mac_tvalid),
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| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/n3xx/ |
| H A D | n3xx_mgt_io_core.v | 387 .tx_tvalid(c2mac_tvalid),
524 .tx_tvalid(c2mac_tvalid),
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| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/radio_200/ |
| H A D | radio_legacy.v | 29 input [63:0] tx_tdata, input tx_tlast, input tx_tvalid, output tx_tready, port
96 .i_aclk(bus_clk), .i_tvalid(tx_tvalid), .i_tready(tx_tready), .i_tdata({tx_tlast, tx_tdata}),
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