/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/mips/tcg/ |
H A D | micromips_translate.c.inc | 625 #define uMIPS_RS(op) ((op >> 4) & 0x7) 626 #define uMIPS_RS2(op) uMIPS_RS(op) 650 int rs = mmreg(uMIPS_RS(ctx->opcode)); 686 int rs = mmreg(uMIPS_RS(ctx->opcode)); 3049 int rs = mmreg(uMIPS_RS(ctx->opcode)); 3097 int rb = mmreg(uMIPS_RS(ctx->opcode)); 3107 int rb = mmreg(uMIPS_RS(ctx->opcode)); 3125 int rb = mmreg(uMIPS_RS(ctx->opcode)); 3134 int rb = mmreg(uMIPS_RS(ctx->opcode)); 3143 int rb = mmreg(uMIPS_RS(ctx->opcode)); [all …]
|
/dports/emulators/qemu/qemu-6.2.0/target/mips/tcg/ |
H A D | micromips_translate.c.inc | 625 #define uMIPS_RS(op) ((op >> 4) & 0x7) 626 #define uMIPS_RS2(op) uMIPS_RS(op) 650 int rs = mmreg(uMIPS_RS(ctx->opcode)); 686 int rs = mmreg(uMIPS_RS(ctx->opcode)); 3049 int rs = mmreg(uMIPS_RS(ctx->opcode)); 3097 int rb = mmreg(uMIPS_RS(ctx->opcode)); 3107 int rb = mmreg(uMIPS_RS(ctx->opcode)); 3125 int rb = mmreg(uMIPS_RS(ctx->opcode)); 3134 int rb = mmreg(uMIPS_RS(ctx->opcode)); 3143 int rb = mmreg(uMIPS_RS(ctx->opcode)); [all …]
|
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/mips/ |
H A D | translate.c | 13306 #define uMIPS_RS(op) ((op >> 4) & 0x7) macro 13307 #define uMIPS_RS2(op) uMIPS_RS(op) 13331 int rs = mmreg(uMIPS_RS(ctx->opcode)); in gen_addiur2() 13367 int rs = mmreg(uMIPS_RS(ctx->opcode)); in gen_andi16() 15795 int rs = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() 15843 int rb = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() 15853 int rb = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() 15871 int rb = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() 15880 int rb = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() 16876 #define NANOMIPS_EXTRACT_RS2(op) uMIPS_RS(op) [all …]
|
/dports/emulators/py-unicorn/unicorn-1.0.2/qemu/target-mips/ |
H A D | translate.c | 12257 #define uMIPS_RS(op) ((op >> 4) & 0x7) macro 12258 #define uMIPS_RS2(op) uMIPS_RS(op) 12282 int rs = mmreg(uMIPS_RS(ctx->opcode)); in gen_addiur2() 12318 int rs = mmreg(uMIPS_RS(ctx->opcode)); in gen_andi16() 14009 int rs = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() 14063 int rb = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() 14073 int rb = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() 14091 int rb = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() 14100 int rb = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() 14109 int rb = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() [all …]
|
/dports/emulators/unicorn/unicorn-1.0.2/qemu/target-mips/ |
H A D | translate.c | 12257 #define uMIPS_RS(op) ((op >> 4) & 0x7) macro 12258 #define uMIPS_RS2(op) uMIPS_RS(op) 12282 int rs = mmreg(uMIPS_RS(ctx->opcode)); in gen_addiur2() 12318 int rs = mmreg(uMIPS_RS(ctx->opcode)); in gen_andi16() 14009 int rs = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() 14063 int rb = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() 14073 int rb = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() 14091 int rb = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() 14100 int rb = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() 14109 int rb = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() [all …]
|
/dports/emulators/qemu60/qemu-6.0.0/target/mips/ |
H A D | translate.c | 14176 #define uMIPS_RS(op) ((op >> 4) & 0x7) macro 14177 #define uMIPS_RS2(op) uMIPS_RS(op) 14201 int rs = mmreg(uMIPS_RS(ctx->opcode)); in gen_addiur2() 14237 int rs = mmreg(uMIPS_RS(ctx->opcode)); in gen_andi16() 16673 int rs = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() 16721 int rb = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() 16731 int rb = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() 16749 int rb = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() 16758 int rb = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() 16767 int rb = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() [all …]
|
/dports/emulators/qemu-utils/qemu-4.2.1/target/mips/ |
H A D | translate.c | 15100 #define uMIPS_RS(op) ((op >> 4) & 0x7) macro 15101 #define uMIPS_RS2(op) uMIPS_RS(op) 15125 int rs = mmreg(uMIPS_RS(ctx->opcode)); in gen_addiur2() 15161 int rs = mmreg(uMIPS_RS(ctx->opcode)); in gen_andi16() 17607 int rs = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() 17655 int rb = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() 17665 int rb = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() 17683 int rb = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() 17692 int rb = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() 17701 int rb = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() [all …]
|
/dports/emulators/qemu-guest-agent/qemu-5.0.1/target/mips/ |
H A D | translate.c | 15188 #define uMIPS_RS(op) ((op >> 4) & 0x7) macro 15189 #define uMIPS_RS2(op) uMIPS_RS(op) 15213 int rs = mmreg(uMIPS_RS(ctx->opcode)); in gen_addiur2() 15249 int rs = mmreg(uMIPS_RS(ctx->opcode)); in gen_andi16() 17695 int rs = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() 17743 int rb = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() 17753 int rb = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() 17771 int rb = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() 17780 int rb = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() 17789 int rb = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() [all …]
|
/dports/emulators/qemu42/qemu-4.2.1/target/mips/ |
H A D | translate.c | 15100 #define uMIPS_RS(op) ((op >> 4) & 0x7) macro 15101 #define uMIPS_RS2(op) uMIPS_RS(op) 15125 int rs = mmreg(uMIPS_RS(ctx->opcode)); in gen_addiur2() 15161 int rs = mmreg(uMIPS_RS(ctx->opcode)); in gen_andi16() 17607 int rs = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() 17655 int rb = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() 17665 int rb = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() 17683 int rb = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() 17692 int rb = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() 17701 int rb = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() [all …]
|
/dports/emulators/qemu5/qemu-5.2.0/target/mips/ |
H A D | translate.c | 15628 #define uMIPS_RS(op) ((op >> 4) & 0x7) macro 15629 #define uMIPS_RS2(op) uMIPS_RS(op) 15653 int rs = mmreg(uMIPS_RS(ctx->opcode)); in gen_addiur2() 15689 int rs = mmreg(uMIPS_RS(ctx->opcode)); in gen_andi16() 18135 int rs = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() 18183 int rb = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() 18193 int rb = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() 18211 int rb = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() 18220 int rb = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() 18229 int rb = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() [all …]
|
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/mips/ |
H A D | translate.c | 15925 #define uMIPS_RS(op) ((op >> 4) & 0x7) macro 15926 #define uMIPS_RS2(op) uMIPS_RS(op) 15950 int rs = mmreg(uMIPS_RS(ctx->opcode)); in gen_addiur2() 15986 int rs = mmreg(uMIPS_RS(ctx->opcode)); in gen_andi16() 18434 int rs = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() 18482 int rb = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() 18492 int rb = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() 18510 int rb = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() 18519 int rb = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() 18528 int rb = mmreg(uMIPS_RS(ctx->opcode)); in decode_micromips_opc() [all …]
|