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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/CSKY/
H A DCSKYInstrInfo.td127 def uimm5 : uimm<5>;
162 (outs GPR:$rz), (ins GPR:$rx, uimm5:$imm5),
163 [(set GPR:$rz, (shl GPR:$rx, uimm5:$imm5))]>;
165 (outs GPR:$rz), (ins GPR:$rx, uimm5:$imm5),
166 [(set GPR:$rz, (srl GPR:$rx, uimm5:$imm5))]>;
168 (outs GPR:$rz), (ins GPR:$rx, uimm5:$imm5),
169 [(set GPR:$rz, (sra GPR:$rx, uimm5:$imm5))]>;
171 (outs GPR:$rz), (ins GPR:$rx, uimm5:$imm5),
172 [(set GPR:$rz, (rotl GPR:$rx, uimm5:$imm5))]>;
233 (ins GPR:$rx, uimm5:$msb, uimm5:$lsb), "zext32",[]>;
[all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/CSKY/
H A DCSKYInstrInfo.td127 def uimm5 : uimm<5>;
162 (outs GPR:$rz), (ins GPR:$rx, uimm5:$imm5),
163 [(set GPR:$rz, (shl GPR:$rx, uimm5:$imm5))]>;
165 (outs GPR:$rz), (ins GPR:$rx, uimm5:$imm5),
166 [(set GPR:$rz, (srl GPR:$rx, uimm5:$imm5))]>;
168 (outs GPR:$rz), (ins GPR:$rx, uimm5:$imm5),
169 [(set GPR:$rz, (sra GPR:$rx, uimm5:$imm5))]>;
171 (outs GPR:$rz), (ins GPR:$rx, uimm5:$imm5),
172 [(set GPR:$rz, (rotl GPR:$rx, uimm5:$imm5))]>;
233 (ins GPR:$rx, uimm5:$msb, uimm5:$lsb), "zext32",[]>;
[all …]
/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYInstrInfo.td127 def uimm5 : uimm<5>;
162 (outs GPR:$rz), (ins GPR:$rx, uimm5:$imm5),
163 [(set GPR:$rz, (shl GPR:$rx, uimm5:$imm5))]>;
165 (outs GPR:$rz), (ins GPR:$rx, uimm5:$imm5),
166 [(set GPR:$rz, (srl GPR:$rx, uimm5:$imm5))]>;
168 (outs GPR:$rz), (ins GPR:$rx, uimm5:$imm5),
169 [(set GPR:$rz, (sra GPR:$rx, uimm5:$imm5))]>;
171 (outs GPR:$rz), (ins GPR:$rx, uimm5:$imm5),
172 [(set GPR:$rz, (rotl GPR:$rx, uimm5:$imm5))]>;
233 (ins GPR:$rx, uimm5:$msb, uimm5:$lsb), "zext32",[]>;
[all …]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/CSKY/
H A DCSKYInstrInfo.td127 def uimm5 : uimm<5>;
162 (outs GPR:$rz), (ins GPR:$rx, uimm5:$imm5),
163 [(set GPR:$rz, (shl GPR:$rx, uimm5:$imm5))]>;
165 (outs GPR:$rz), (ins GPR:$rx, uimm5:$imm5),
166 [(set GPR:$rz, (srl GPR:$rx, uimm5:$imm5))]>;
168 (outs GPR:$rz), (ins GPR:$rx, uimm5:$imm5),
169 [(set GPR:$rz, (sra GPR:$rx, uimm5:$imm5))]>;
171 (outs GPR:$rz), (ins GPR:$rx, uimm5:$imm5),
172 [(set GPR:$rz, (rotl GPR:$rx, uimm5:$imm5))]>;
233 (ins GPR:$rx, uimm5:$msb, uimm5:$lsb), "zext32",[]>;
[all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/CSKY/
H A DCSKYInstrInfo.td127 def uimm5 : uimm<5>;
162 (outs GPR:$rz), (ins GPR:$rx, uimm5:$imm5),
163 [(set GPR:$rz, (shl GPR:$rx, uimm5:$imm5))]>;
165 (outs GPR:$rz), (ins GPR:$rx, uimm5:$imm5),
166 [(set GPR:$rz, (srl GPR:$rx, uimm5:$imm5))]>;
168 (outs GPR:$rz), (ins GPR:$rx, uimm5:$imm5),
169 [(set GPR:$rz, (sra GPR:$rx, uimm5:$imm5))]>;
171 (outs GPR:$rz), (ins GPR:$rx, uimm5:$imm5),
172 [(set GPR:$rz, (rotl GPR:$rx, uimm5:$imm5))]>;
233 (ins GPR:$rx, uimm5:$msb, uimm5:$lsb), "zext32",[]>;
[all …]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/CSKY/
H A DCSKYInstrInfo.td127 def uimm5 : uimm<5>;
162 (outs GPR:$rz), (ins GPR:$rx, uimm5:$imm5),
163 [(set GPR:$rz, (shl GPR:$rx, uimm5:$imm5))]>;
165 (outs GPR:$rz), (ins GPR:$rx, uimm5:$imm5),
166 [(set GPR:$rz, (srl GPR:$rx, uimm5:$imm5))]>;
168 (outs GPR:$rz), (ins GPR:$rx, uimm5:$imm5),
169 [(set GPR:$rz, (sra GPR:$rx, uimm5:$imm5))]>;
171 (outs GPR:$rz), (ins GPR:$rx, uimm5:$imm5),
172 [(set GPR:$rz, (rotl GPR:$rx, uimm5:$imm5))]>;
233 (ins GPR:$rx, uimm5:$msb, uimm5:$lsb), "zext32",[]>;
[all …]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/CSKY/
H A DCSKYInstrInfo.td52 def uimm5 : uimm<5>;
69 (outs GPR:$rz), (ins GPR:$rx, uimm5:$imm5),
70 [(set GPR:$rz, (shl GPR:$rx, uimm5:$imm5))]>;
72 (outs GPR:$rz), (ins GPR:$rx, uimm5:$imm5),
73 [(set GPR:$rz, (srl GPR:$rx, uimm5:$imm5))]>;
75 (outs GPR:$rz), (ins GPR:$rx, uimm5:$imm5),
76 [(set GPR:$rz, (sra GPR:$rx, uimm5:$imm5))]>;
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/CSKY/
H A DCSKYInstrInfo.td52 def uimm5 : uimm<5>;
69 (outs GPR:$rz), (ins GPR:$rx, uimm5:$imm5),
70 [(set GPR:$rz, (shl GPR:$rx, uimm5:$imm5))]>;
72 (outs GPR:$rz), (ins GPR:$rx, uimm5:$imm5),
73 [(set GPR:$rz, (srl GPR:$rx, uimm5:$imm5))]>;
75 (outs GPR:$rz), (ins GPR:$rx, uimm5:$imm5),
76 [(set GPR:$rz, (sra GPR:$rx, uimm5:$imm5))]>;
/dports/devel/binutils/binutils-2.37/gas/testsuite/gas/rx/
H A Dshlr.sm1 shlr #{uimm5},{reg}
3 shlr #{uimm5},{reg},{reg}
H A Dshar.sm1 shar #{uimm5},{reg}
3 shar #{uimm5},{reg},{reg}
H A Dshll.sm1 shll #{uimm5},{reg}
3 shll #{uimm5},{reg},{reg}
/dports/lang/gnatdroid-binutils-x86/binutils-2.27/gas/testsuite/gas/rx/
H A Dshlr.sm1 shlr #{uimm5},{reg}
3 shlr #{uimm5},{reg},{reg}
H A Dshar.sm1 shar #{uimm5},{reg}
3 shar #{uimm5},{reg},{reg}
H A Dshll.sm1 shll #{uimm5},{reg}
3 shll #{uimm5},{reg},{reg}
/dports/devel/arm-elf-binutils/binutils-2.37/gas/testsuite/gas/rx/
H A Dshar.sm1 shar #{uimm5},{reg}
3 shar #{uimm5},{reg},{reg}
H A Dshlr.sm1 shlr #{uimm5},{reg}
3 shlr #{uimm5},{reg},{reg}
H A Dshll.sm1 shll #{uimm5},{reg}
3 shll #{uimm5},{reg},{reg}
/dports/devel/gnulibiberty/binutils-2.37/gas/testsuite/gas/rx/
H A Dshll.sm1 shll #{uimm5},{reg}
3 shll #{uimm5},{reg},{reg}
H A Dshlr.sm1 shlr #{uimm5},{reg}
3 shlr #{uimm5},{reg},{reg}
H A Dshar.sm1 shar #{uimm5},{reg}
3 shar #{uimm5},{reg},{reg}
/dports/lang/gnatdroid-binutils/binutils-2.27/gas/testsuite/gas/rx/
H A Dshlr.sm1 shlr #{uimm5},{reg}
3 shlr #{uimm5},{reg},{reg}
H A Dshar.sm1 shar #{uimm5},{reg}
3 shar #{uimm5},{reg},{reg}
H A Dshll.sm1 shll #{uimm5},{reg}
3 shll #{uimm5},{reg},{reg}
/dports/devel/llvm70/llvm-7.0.1.src/test/MC/RISCV/
H A Drv64i-invalid.s4 ## uimm5
14 ## uimm5
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/RISCV/
H A DRISCVInstrInfo.td431 (ins csr_sysreg:$imm12, uimm5:$rs1),
826 (SLLIW GPR:$rd, GPR:$rs1, uimm5:$shamt)>;
828 (SRLIW GPR:$rd, GPR:$rs1, uimm5:$shamt)>;
830 (SRAIW GPR:$rd, GPR:$rs1, uimm5:$shamt)>;
1184 : Pseudo<(outs), (ins uimm5:$val),
1201 : Pseudo<(outs GPR:$rd), (ins uimm5:$val),
1248 def : Pat<(sext_inreg (shl GPR:$rs1, uimm5:$shamt), i32),
1249 (SLLIW GPR:$rs1, uimm5:$shamt)>;
1251 (SRLIW GPR:$rs1, uimm5:$shamt)>;
1254 def : Pat<(sra (sext_inreg GPR:$rs1, i32), uimm5:$shamt),
[all …]

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