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/dports/sysutils/vector/lucet-d4fc14a03bdb99ac83173d27fddf1aca48412a86/wasmtime/cranelift/filetests/filetests/isa/x86/
H A Dbnot-b1.clif9 [-,%rcx] v222 = bconst.b1 true ; bin: 40 b9 00000001
11 [-,%rax] v224 = band v223, v222 ; bin: 40 21 c8
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/AMDGPU/
H A Dreserve-vgpr-for-sgpr-spill.ll46 ,~{v220},~{v221},~{v222},~{v223},~{v224},~{v225},~{v226},~{v227},~{v228},~{v229}
91 ,~{v220},~{v221},~{v222},~{v223},~{v224},~{v225},~{v226},~{v227},~{v228},~{v229}
133 ,~{v220},~{v221},~{v222},~{v223},~{v224},~{v225},~{v226},~{v227},~{v228},~{v229}
182 ,~{v220},~{v221},~{v222},~{v223},~{v224},~{v225},~{v226},~{v227},~{v228},~{v229}
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Dreserve-vgpr-for-sgpr-spill.ll46 ,~{v220},~{v221},~{v222},~{v223},~{v224},~{v225},~{v226},~{v227},~{v228},~{v229}
91 ,~{v220},~{v221},~{v222},~{v223},~{v224},~{v225},~{v226},~{v227},~{v228},~{v229}
133 ,~{v220},~{v221},~{v222},~{v223},~{v224},~{v225},~{v226},~{v227},~{v228},~{v229}
182 ,~{v220},~{v221},~{v222},~{v223},~{v224},~{v225},~{v226},~{v227},~{v228},~{v229}
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Dreserve-vgpr-for-sgpr-spill.ll46 ,~{v220},~{v221},~{v222},~{v223},~{v224},~{v225},~{v226},~{v227},~{v228},~{v229}
91 ,~{v220},~{v221},~{v222},~{v223},~{v224},~{v225},~{v226},~{v227},~{v228},~{v229}
133 ,~{v220},~{v221},~{v222},~{v223},~{v224},~{v225},~{v226},~{v227},~{v228},~{v229}
182 ,~{v220},~{v221},~{v222},~{v223},~{v224},~{v225},~{v226},~{v227},~{v228},~{v229}
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AMDGPU/
H A Dreserve-vgpr-for-sgpr-spill.ll46 ,~{v220},~{v221},~{v222},~{v223},~{v224},~{v225},~{v226},~{v227},~{v228},~{v229}
91 ,~{v220},~{v221},~{v222},~{v223},~{v224},~{v225},~{v226},~{v227},~{v228},~{v229}
133 ,~{v220},~{v221},~{v222},~{v223},~{v224},~{v225},~{v226},~{v227},~{v228},~{v229}
182 ,~{v220},~{v221},~{v222},~{v223},~{v224},~{v225},~{v226},~{v227},~{v228},~{v229}
225 ,~{v220},~{v221},~{v222},~{v223},~{v224},~{v225},~{v226},~{v227},~{v228},~{v229}
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Dreserve-vgpr-for-sgpr-spill.ll46 ,~{v220},~{v221},~{v222},~{v223},~{v224},~{v225},~{v226},~{v227},~{v228},~{v229}
91 ,~{v220},~{v221},~{v222},~{v223},~{v224},~{v225},~{v226},~{v227},~{v228},~{v229}
133 ,~{v220},~{v221},~{v222},~{v223},~{v224},~{v225},~{v226},~{v227},~{v228},~{v229}
182 ,~{v220},~{v221},~{v222},~{v223},~{v224},~{v225},~{v226},~{v227},~{v228},~{v229}
225 ,~{v220},~{v221},~{v222},~{v223},~{v224},~{v225},~{v226},~{v227},~{v228},~{v229}
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/AMDGPU/
H A Dreserve-vgpr-for-sgpr-spill.ll46 ,~{v220},~{v221},~{v222},~{v223},~{v224},~{v225},~{v226},~{v227},~{v228},~{v229}
91 ,~{v220},~{v221},~{v222},~{v223},~{v224},~{v225},~{v226},~{v227},~{v228},~{v229}
133 ,~{v220},~{v221},~{v222},~{v223},~{v224},~{v225},~{v226},~{v227},~{v228},~{v229}
182 ,~{v220},~{v221},~{v222},~{v223},~{v224},~{v225},~{v226},~{v227},~{v228},~{v229}
225 ,~{v220},~{v221},~{v222},~{v223},~{v224},~{v225},~{v226},~{v227},~{v228},~{v229}
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Dreserve-vgpr-for-sgpr-spill.ll46 ,~{v220},~{v221},~{v222},~{v223},~{v224},~{v225},~{v226},~{v227},~{v228},~{v229}
91 ,~{v220},~{v221},~{v222},~{v223},~{v224},~{v225},~{v226},~{v227},~{v228},~{v229}
133 ,~{v220},~{v221},~{v222},~{v223},~{v224},~{v225},~{v226},~{v227},~{v228},~{v229}
182 ,~{v220},~{v221},~{v222},~{v223},~{v224},~{v225},~{v226},~{v227},~{v228},~{v229}
225 ,~{v220},~{v221},~{v222},~{v223},~{v224},~{v225},~{v226},~{v227},~{v228},~{v229}
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Dreserve-vgpr-for-sgpr-spill.ll46 ,~{v220},~{v221},~{v222},~{v223},~{v224},~{v225},~{v226},~{v227},~{v228},~{v229}
91 ,~{v220},~{v221},~{v222},~{v223},~{v224},~{v225},~{v226},~{v227},~{v228},~{v229}
133 ,~{v220},~{v221},~{v222},~{v223},~{v224},~{v225},~{v226},~{v227},~{v228},~{v229}
182 ,~{v220},~{v221},~{v222},~{v223},~{v224},~{v225},~{v226},~{v227},~{v228},~{v229}
225 ,~{v220},~{v221},~{v222},~{v223},~{v224},~{v225},~{v226},~{v227},~{v228},~{v229}
/dports/misc/ncnn/ncnn-20211208/toolchains/
H A Dc906-v222.toolchain.cmake33 # cmake -DCMAKE_TOOLCHAIN_FILE=../toolchains/c906-v222.toolchain.cmake -DCMAKE_BUILD_TYPE=release -…
/dports/textproc/miller/miller-5.10.2/go/reg-test/expected/
H A Dcase-dsl-indirect-srec-assignments.sh.out33 …216=v215,k217=v216,k218=v217,k219=v218,k220=v219,k221=v220,k222=v221,k223=v222,k224=v223,k225=v224…
34 …216=v215,k217=v216,k218=v217,k219=v218,k220=v219,k221=v220,k222=v221,k223=v222,k224=v223,k225=v224…
35 …216=v215,k217=v216,k218=v217,k219=v218,k220=v219,k221=v220,k222=v221,k223=v222,k224=v223,k225=v224…
36 …216=v215,k217=v216,k218=v217,k219=v218,k220=v219,k221=v220,k222=v221,k223=v222,k224=v223,k225=v224…
37 …216=v215,k217=v216,k218=v217,k219=v218,k220=v219,k221=v220,k222=v221,k223=v222,k224=v223,k225=v224…
38 …216=v215,k217=v216,k218=v217,k219=v218,k220=v219,k221=v220,k222=v221,k223=v222,k224=v223,k225=v224…
39 …216=v215,k217=v216,k218=v217,k219=v218,k220=v219,k221=v220,k222=v221,k223=v222,k224=v223,k225=v224…
40 …216=v215,k217=v216,k218=v217,k219=v218,k220=v219,k221=v220,k222=v221,k223=v222,k224=v223,k225=v224…
41 …216=v215,k217=v216,k218=v217,k219=v218,k220=v219,k221=v220,k222=v221,k223=v222,k224=v223,k225=v224…
42 …216=v215,k217=v216,k218=v217,k219=v218,k220=v219,k221=v220,k222=v221,k223=v222,k224=v223,k225=v224…
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/AMDGPU/
H A Dreserve-vgpr-for-sgpr-spill.ll42 ,~{v220},~{v221},~{v222},~{v223},~{v224},~{v225},~{v226},~{v227},~{v228},~{v229}
/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/AMDGPU/
H A Dreserve-vgpr-for-sgpr-spill.ll42 ,~{v220},~{v221},~{v222},~{v223},~{v224},~{v225},~{v226},~{v227},~{v228},~{v229}
/dports/devel/libslang2/slang-2.3.2/modules/test/
H A Dtest_json.sl144 "k222" : "v222"
177 expect_struct_key_value (json."k2"."k22", "k222", "v222");
/dports/www/firefox/firefox-99.0/third_party/jpeg-xl/lib/jxl/
H A Dfast_dct32-inl.h257 int16x8_t v222 = vqrdmulhq_n_s16(v221, 16890); in FastIDCT() local
258 int16x8_t v223 = vaddq_s16(v209, v222); in FastIDCT()
383 int16x8_t v332 = vsubq_s16(v209, v222); in FastIDCT()
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/Hexagon/
H A Dconcat-vectors-legalize.ll300 %v222 = add nsw i32 %v35, 1
301 %v223 = sext i32 %v222 to i64
363 %v272 = mul nsw i32 %v236, %v222
432 %v331 = mul nsw i32 %v296, %v222
477 %v360 = mul nsw i32 %v359, %v222
492 %v375 = mul nsw i32 %v374, %v222
671 %v534 = mul nsw i32 %v533, %v222
685 %v548 = mul nsw i32 %v547, %v222
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/Hexagon/
H A Dconcat-vectors-legalize.ll300 %v222 = add nsw i32 %v35, 1
301 %v223 = sext i32 %v222 to i64
363 %v272 = mul nsw i32 %v236, %v222
432 %v331 = mul nsw i32 %v296, %v222
477 %v360 = mul nsw i32 %v359, %v222
492 %v375 = mul nsw i32 %v374, %v222
671 %v534 = mul nsw i32 %v533, %v222
685 %v548 = mul nsw i32 %v547, %v222
/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/Hexagon/
H A Dconcat-vectors-legalize.ll300 %v222 = add nsw i32 %v35, 1
301 %v223 = sext i32 %v222 to i64
363 %v272 = mul nsw i32 %v236, %v222
432 %v331 = mul nsw i32 %v296, %v222
477 %v360 = mul nsw i32 %v359, %v222
492 %v375 = mul nsw i32 %v374, %v222
671 %v534 = mul nsw i32 %v533, %v222
685 %v548 = mul nsw i32 %v547, %v222
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/Hexagon/
H A Dconcat-vectors-legalize.ll300 %v222 = add nsw i32 %v35, 1
301 %v223 = sext i32 %v222 to i64
363 %v272 = mul nsw i32 %v236, %v222
432 %v331 = mul nsw i32 %v296, %v222
477 %v360 = mul nsw i32 %v359, %v222
492 %v375 = mul nsw i32 %v374, %v222
671 %v534 = mul nsw i32 %v533, %v222
685 %v548 = mul nsw i32 %v547, %v222
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/Hexagon/
H A Dconcat-vectors-legalize.ll300 %v222 = add nsw i32 %v35, 1
301 %v223 = sext i32 %v222 to i64
363 %v272 = mul nsw i32 %v236, %v222
432 %v331 = mul nsw i32 %v296, %v222
477 %v360 = mul nsw i32 %v359, %v222
492 %v375 = mul nsw i32 %v374, %v222
671 %v534 = mul nsw i32 %v533, %v222
685 %v548 = mul nsw i32 %v547, %v222
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/Hexagon/
H A Dconcat-vectors-legalize.ll300 %v222 = add nsw i32 %v35, 1
301 %v223 = sext i32 %v222 to i64
363 %v272 = mul nsw i32 %v236, %v222
432 %v331 = mul nsw i32 %v296, %v222
477 %v360 = mul nsw i32 %v359, %v222
492 %v375 = mul nsw i32 %v374, %v222
671 %v534 = mul nsw i32 %v533, %v222
685 %v548 = mul nsw i32 %v547, %v222
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/Hexagon/
H A Dconcat-vectors-legalize.ll300 %v222 = add nsw i32 %v35, 1
301 %v223 = sext i32 %v222 to i64
363 %v272 = mul nsw i32 %v236, %v222
432 %v331 = mul nsw i32 %v296, %v222
477 %v360 = mul nsw i32 %v359, %v222
492 %v375 = mul nsw i32 %v374, %v222
671 %v534 = mul nsw i32 %v533, %v222
685 %v548 = mul nsw i32 %v547, %v222
/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/Hexagon/
H A Dconcat-vectors-legalize.ll300 %v222 = add nsw i32 %v35, 1
301 %v223 = sext i32 %v222 to i64
363 %v272 = mul nsw i32 %v236, %v222
432 %v331 = mul nsw i32 %v296, %v222
477 %v360 = mul nsw i32 %v359, %v222
492 %v375 = mul nsw i32 %v374, %v222
671 %v534 = mul nsw i32 %v533, %v222
685 %v548 = mul nsw i32 %v547, %v222
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/Hexagon/
H A Dconcat-vectors-legalize.ll300 %v222 = add nsw i32 %v35, 1
301 %v223 = sext i32 %v222 to i64
363 %v272 = mul nsw i32 %v236, %v222
432 %v331 = mul nsw i32 %v296, %v222
477 %v360 = mul nsw i32 %v359, %v222
492 %v375 = mul nsw i32 %v374, %v222
671 %v534 = mul nsw i32 %v533, %v222
685 %v548 = mul nsw i32 %v547, %v222
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/Hexagon/
H A Dconcat-vectors-legalize.ll300 %v222 = add nsw i32 %v35, 1
301 %v223 = sext i32 %v222 to i64
363 %v272 = mul nsw i32 %v236, %v222
432 %v331 = mul nsw i32 %v296, %v222
477 %v360 = mul nsw i32 %v359, %v222
492 %v375 = mul nsw i32 %v374, %v222
671 %v534 = mul nsw i32 %v533, %v222
685 %v548 = mul nsw i32 %v547, %v222

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