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/dports/devel/llvm80/llvm-8.0.1.src/test/CodeGen/AArch64/
H A Darm64-vfloatintrinsics.ll201 %1 = call %v8f16 @llvm.pow.v8f16(%v8f16 %a, %v8f16 %b)
239 define %v8f16 @test_v8f16.fma(%v8f16 %a, %v8f16 %b, %v8f16 %c) {
244 %1 = call %v8f16 @llvm.fma.v8f16(%v8f16 %a, %v8f16 %b, %v8f16 %c)
302 declare %v8f16 @llvm.sqrt.v8f16(%v8f16) #0
304 declare %v8f16 @llvm.sin.v8f16(%v8f16) #0
305 declare %v8f16 @llvm.cos.v8f16(%v8f16) #0
306 declare %v8f16 @llvm.pow.v8f16(%v8f16, %v8f16) #0
307 declare %v8f16 @llvm.exp.v8f16(%v8f16) #0
308 declare %v8f16 @llvm.exp2.v8f16(%v8f16) #0
309 declare %v8f16 @llvm.log.v8f16(%v8f16) #0
[all …]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AArch64/
H A Darm64-vfloatintrinsics.ll341 %1 = call %v8f16 @llvm.pow.v8f16(%v8f16 %a, %v8f16 %b)
397 define %v8f16 @test_v8f16.fma(%v8f16 %a, %v8f16 %b, %v8f16 %c) {
406 %1 = call %v8f16 @llvm.fma.v8f16(%v8f16 %a, %v8f16 %b, %v8f16 %c)
535 declare %v8f16 @llvm.sqrt.v8f16(%v8f16) #0
537 declare %v8f16 @llvm.sin.v8f16(%v8f16) #0
538 declare %v8f16 @llvm.cos.v8f16(%v8f16) #0
539 declare %v8f16 @llvm.pow.v8f16(%v8f16, %v8f16) #0
540 declare %v8f16 @llvm.exp.v8f16(%v8f16) #0
541 declare %v8f16 @llvm.exp2.v8f16(%v8f16) #0
542 declare %v8f16 @llvm.log.v8f16(%v8f16) #0
[all …]
H A Dfp16-vector-load-store.ll53 ; Load to one lane of v8f16
72 ; Simple store of v8f16
130 ; Store from one lane of v8f16
336 ; Load 2 x v8f16 with duplication
345 ; Load 3 x v8f16 with duplication
432 ; Load one lane of 2 x v8f16
441 ; Load one lane of 3 x v8f16
450 ; Load one lane of 8 x v8f16
459 ; Store one lane of 2 x v8f16
468 ; Store one lane of 3 x v8f16
[all …]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AArch64/
H A Darm64-vfloatintrinsics.ll341 %1 = call %v8f16 @llvm.pow.v8f16(%v8f16 %a, %v8f16 %b)
397 define %v8f16 @test_v8f16.fma(%v8f16 %a, %v8f16 %b, %v8f16 %c) {
406 %1 = call %v8f16 @llvm.fma.v8f16(%v8f16 %a, %v8f16 %b, %v8f16 %c)
535 declare %v8f16 @llvm.sqrt.v8f16(%v8f16) #0
537 declare %v8f16 @llvm.sin.v8f16(%v8f16) #0
538 declare %v8f16 @llvm.cos.v8f16(%v8f16) #0
539 declare %v8f16 @llvm.pow.v8f16(%v8f16, %v8f16) #0
540 declare %v8f16 @llvm.exp.v8f16(%v8f16) #0
541 declare %v8f16 @llvm.exp2.v8f16(%v8f16) #0
542 declare %v8f16 @llvm.log.v8f16(%v8f16) #0
[all …]
H A Dfp16-vector-load-store.ll53 ; Load to one lane of v8f16
72 ; Simple store of v8f16
130 ; Store from one lane of v8f16
336 ; Load 2 x v8f16 with duplication
345 ; Load 3 x v8f16 with duplication
432 ; Load one lane of 2 x v8f16
441 ; Load one lane of 3 x v8f16
450 ; Load one lane of 8 x v8f16
459 ; Store one lane of 2 x v8f16
468 ; Store one lane of 3 x v8f16
[all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/AArch64/
H A Darm64-vfloatintrinsics.ll341 %1 = call %v8f16 @llvm.pow.v8f16(%v8f16 %a, %v8f16 %b)
397 define %v8f16 @test_v8f16.fma(%v8f16 %a, %v8f16 %b, %v8f16 %c) {
406 %1 = call %v8f16 @llvm.fma.v8f16(%v8f16 %a, %v8f16 %b, %v8f16 %c)
535 declare %v8f16 @llvm.sqrt.v8f16(%v8f16) #0
537 declare %v8f16 @llvm.sin.v8f16(%v8f16) #0
538 declare %v8f16 @llvm.cos.v8f16(%v8f16) #0
539 declare %v8f16 @llvm.pow.v8f16(%v8f16, %v8f16) #0
540 declare %v8f16 @llvm.exp.v8f16(%v8f16) #0
541 declare %v8f16 @llvm.exp2.v8f16(%v8f16) #0
542 declare %v8f16 @llvm.log.v8f16(%v8f16) #0
[all …]
H A Dfp16-vector-load-store.ll53 ; Load to one lane of v8f16
72 ; Simple store of v8f16
130 ; Store from one lane of v8f16
336 ; Load 2 x v8f16 with duplication
345 ; Load 3 x v8f16 with duplication
432 ; Load one lane of 2 x v8f16
441 ; Load one lane of 3 x v8f16
450 ; Load one lane of 8 x v8f16
459 ; Store one lane of 2 x v8f16
468 ; Store one lane of 3 x v8f16
[all …]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/AArch64/
H A Darm64-vfloatintrinsics.ll341 %1 = call %v8f16 @llvm.pow.v8f16(%v8f16 %a, %v8f16 %b)
397 define %v8f16 @test_v8f16.fma(%v8f16 %a, %v8f16 %b, %v8f16 %c) {
406 %1 = call %v8f16 @llvm.fma.v8f16(%v8f16 %a, %v8f16 %b, %v8f16 %c)
535 declare %v8f16 @llvm.sqrt.v8f16(%v8f16) #0
537 declare %v8f16 @llvm.sin.v8f16(%v8f16) #0
538 declare %v8f16 @llvm.cos.v8f16(%v8f16) #0
539 declare %v8f16 @llvm.pow.v8f16(%v8f16, %v8f16) #0
540 declare %v8f16 @llvm.exp.v8f16(%v8f16) #0
541 declare %v8f16 @llvm.exp2.v8f16(%v8f16) #0
542 declare %v8f16 @llvm.log.v8f16(%v8f16) #0
[all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/AArch64/
H A Darm64-vfloatintrinsics.ll341 %1 = call %v8f16 @llvm.pow.v8f16(%v8f16 %a, %v8f16 %b)
397 define %v8f16 @test_v8f16.fma(%v8f16 %a, %v8f16 %b, %v8f16 %c) {
406 %1 = call %v8f16 @llvm.fma.v8f16(%v8f16 %a, %v8f16 %b, %v8f16 %c)
535 declare %v8f16 @llvm.sqrt.v8f16(%v8f16) #0
537 declare %v8f16 @llvm.sin.v8f16(%v8f16) #0
538 declare %v8f16 @llvm.cos.v8f16(%v8f16) #0
539 declare %v8f16 @llvm.pow.v8f16(%v8f16, %v8f16) #0
540 declare %v8f16 @llvm.exp.v8f16(%v8f16) #0
541 declare %v8f16 @llvm.exp2.v8f16(%v8f16) #0
542 declare %v8f16 @llvm.log.v8f16(%v8f16) #0
[all …]
H A Dfp16-vector-load-store.ll53 ; Load to one lane of v8f16
72 ; Simple store of v8f16
130 ; Store from one lane of v8f16
336 ; Load 2 x v8f16 with duplication
345 ; Load 3 x v8f16 with duplication
432 ; Load one lane of 2 x v8f16
441 ; Load one lane of 3 x v8f16
450 ; Load one lane of 8 x v8f16
459 ; Store one lane of 2 x v8f16
468 ; Store one lane of 3 x v8f16
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/AArch64/
H A Darm64-vfloatintrinsics.ll326 %1 = call %v8f16 @llvm.pow.v8f16(%v8f16 %a, %v8f16 %b)
382 define %v8f16 @test_v8f16.fma(%v8f16 %a, %v8f16 %b, %v8f16 %c) {
391 %1 = call %v8f16 @llvm.fma.v8f16(%v8f16 %a, %v8f16 %b, %v8f16 %c)
506 declare %v8f16 @llvm.sqrt.v8f16(%v8f16) #0
508 declare %v8f16 @llvm.sin.v8f16(%v8f16) #0
509 declare %v8f16 @llvm.cos.v8f16(%v8f16) #0
510 declare %v8f16 @llvm.pow.v8f16(%v8f16, %v8f16) #0
511 declare %v8f16 @llvm.exp.v8f16(%v8f16) #0
512 declare %v8f16 @llvm.exp2.v8f16(%v8f16) #0
513 declare %v8f16 @llvm.log.v8f16(%v8f16) #0
[all …]
H A Dfp16-vector-load-store.ll53 ; Load to one lane of v8f16
72 ; Simple store of v8f16
130 ; Store from one lane of v8f16
336 ; Load 2 x v8f16 with duplication
345 ; Load 3 x v8f16 with duplication
432 ; Load one lane of 2 x v8f16
441 ; Load one lane of 3 x v8f16
450 ; Load one lane of 8 x v8f16
459 ; Store one lane of 2 x v8f16
468 ; Store one lane of 3 x v8f16
[all …]
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/AArch64/
H A Darm64-vfloatintrinsics.ll326 %1 = call %v8f16 @llvm.pow.v8f16(%v8f16 %a, %v8f16 %b)
382 define %v8f16 @test_v8f16.fma(%v8f16 %a, %v8f16 %b, %v8f16 %c) {
391 %1 = call %v8f16 @llvm.fma.v8f16(%v8f16 %a, %v8f16 %b, %v8f16 %c)
506 declare %v8f16 @llvm.sqrt.v8f16(%v8f16) #0
508 declare %v8f16 @llvm.sin.v8f16(%v8f16) #0
509 declare %v8f16 @llvm.cos.v8f16(%v8f16) #0
510 declare %v8f16 @llvm.pow.v8f16(%v8f16, %v8f16) #0
511 declare %v8f16 @llvm.exp.v8f16(%v8f16) #0
512 declare %v8f16 @llvm.exp2.v8f16(%v8f16) #0
513 declare %v8f16 @llvm.log.v8f16(%v8f16) #0
[all …]
H A Dfp16-vector-load-store.ll53 ; Load to one lane of v8f16
72 ; Simple store of v8f16
130 ; Store from one lane of v8f16
336 ; Load 2 x v8f16 with duplication
345 ; Load 3 x v8f16 with duplication
432 ; Load one lane of 2 x v8f16
441 ; Load one lane of 3 x v8f16
450 ; Load one lane of 8 x v8f16
459 ; Store one lane of 2 x v8f16
468 ; Store one lane of 3 x v8f16
[all …]
/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/AArch64/
H A Darm64-vfloatintrinsics.ll326 %1 = call %v8f16 @llvm.pow.v8f16(%v8f16 %a, %v8f16 %b)
382 define %v8f16 @test_v8f16.fma(%v8f16 %a, %v8f16 %b, %v8f16 %c) {
391 %1 = call %v8f16 @llvm.fma.v8f16(%v8f16 %a, %v8f16 %b, %v8f16 %c)
506 declare %v8f16 @llvm.sqrt.v8f16(%v8f16) #0
508 declare %v8f16 @llvm.sin.v8f16(%v8f16) #0
509 declare %v8f16 @llvm.cos.v8f16(%v8f16) #0
510 declare %v8f16 @llvm.pow.v8f16(%v8f16, %v8f16) #0
511 declare %v8f16 @llvm.exp.v8f16(%v8f16) #0
512 declare %v8f16 @llvm.exp2.v8f16(%v8f16) #0
513 declare %v8f16 @llvm.log.v8f16(%v8f16) #0
[all …]
H A Dfp16-vector-load-store.ll53 ; Load to one lane of v8f16
72 ; Simple store of v8f16
130 ; Store from one lane of v8f16
336 ; Load 2 x v8f16 with duplication
345 ; Load 3 x v8f16 with duplication
432 ; Load one lane of 2 x v8f16
441 ; Load one lane of 3 x v8f16
450 ; Load one lane of 8 x v8f16
459 ; Store one lane of 2 x v8f16
468 ; Store one lane of 3 x v8f16
[all …]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/AArch64/
H A Darm64-vfloatintrinsics.ll326 %1 = call %v8f16 @llvm.pow.v8f16(%v8f16 %a, %v8f16 %b)
382 define %v8f16 @test_v8f16.fma(%v8f16 %a, %v8f16 %b, %v8f16 %c) {
391 %1 = call %v8f16 @llvm.fma.v8f16(%v8f16 %a, %v8f16 %b, %v8f16 %c)
506 declare %v8f16 @llvm.sqrt.v8f16(%v8f16) #0
508 declare %v8f16 @llvm.sin.v8f16(%v8f16) #0
509 declare %v8f16 @llvm.cos.v8f16(%v8f16) #0
510 declare %v8f16 @llvm.pow.v8f16(%v8f16, %v8f16) #0
511 declare %v8f16 @llvm.exp.v8f16(%v8f16) #0
512 declare %v8f16 @llvm.exp2.v8f16(%v8f16) #0
513 declare %v8f16 @llvm.log.v8f16(%v8f16) #0
[all …]
H A Dfp16-vector-load-store.ll53 ; Load to one lane of v8f16
72 ; Simple store of v8f16
130 ; Store from one lane of v8f16
336 ; Load 2 x v8f16 with duplication
345 ; Load 3 x v8f16 with duplication
432 ; Load one lane of 2 x v8f16
441 ; Load one lane of 3 x v8f16
450 ; Load one lane of 8 x v8f16
459 ; Store one lane of 2 x v8f16
468 ; Store one lane of 3 x v8f16
[all …]
/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/AArch64/
H A Darm64-vfloatintrinsics.ll326 %1 = call %v8f16 @llvm.pow.v8f16(%v8f16 %a, %v8f16 %b)
382 define %v8f16 @test_v8f16.fma(%v8f16 %a, %v8f16 %b, %v8f16 %c) {
391 %1 = call %v8f16 @llvm.fma.v8f16(%v8f16 %a, %v8f16 %b, %v8f16 %c)
506 declare %v8f16 @llvm.sqrt.v8f16(%v8f16) #0
508 declare %v8f16 @llvm.sin.v8f16(%v8f16) #0
509 declare %v8f16 @llvm.cos.v8f16(%v8f16) #0
510 declare %v8f16 @llvm.pow.v8f16(%v8f16, %v8f16) #0
511 declare %v8f16 @llvm.exp.v8f16(%v8f16) #0
512 declare %v8f16 @llvm.exp2.v8f16(%v8f16) #0
513 declare %v8f16 @llvm.log.v8f16(%v8f16) #0
[all …]
H A Dfp16-vector-load-store.ll53 ; Load to one lane of v8f16
72 ; Simple store of v8f16
130 ; Store from one lane of v8f16
336 ; Load 2 x v8f16 with duplication
345 ; Load 3 x v8f16 with duplication
432 ; Load one lane of 2 x v8f16
441 ; Load one lane of 3 x v8f16
450 ; Load one lane of 8 x v8f16
459 ; Store one lane of 2 x v8f16
468 ; Store one lane of 3 x v8f16
[all …]
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/AArch64/
H A Darm64-vfloatintrinsics.ll326 %1 = call %v8f16 @llvm.pow.v8f16(%v8f16 %a, %v8f16 %b)
382 define %v8f16 @test_v8f16.fma(%v8f16 %a, %v8f16 %b, %v8f16 %c) {
391 %1 = call %v8f16 @llvm.fma.v8f16(%v8f16 %a, %v8f16 %b, %v8f16 %c)
506 declare %v8f16 @llvm.sqrt.v8f16(%v8f16) #0
508 declare %v8f16 @llvm.sin.v8f16(%v8f16) #0
509 declare %v8f16 @llvm.cos.v8f16(%v8f16) #0
510 declare %v8f16 @llvm.pow.v8f16(%v8f16, %v8f16) #0
511 declare %v8f16 @llvm.exp.v8f16(%v8f16) #0
512 declare %v8f16 @llvm.exp2.v8f16(%v8f16) #0
513 declare %v8f16 @llvm.log.v8f16(%v8f16) #0
[all …]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/AArch64/
H A Darm64-vfloatintrinsics.ll326 %1 = call %v8f16 @llvm.pow.v8f16(%v8f16 %a, %v8f16 %b)
382 define %v8f16 @test_v8f16.fma(%v8f16 %a, %v8f16 %b, %v8f16 %c) {
391 %1 = call %v8f16 @llvm.fma.v8f16(%v8f16 %a, %v8f16 %b, %v8f16 %c)
506 declare %v8f16 @llvm.sqrt.v8f16(%v8f16) #0
508 declare %v8f16 @llvm.sin.v8f16(%v8f16) #0
509 declare %v8f16 @llvm.cos.v8f16(%v8f16) #0
510 declare %v8f16 @llvm.pow.v8f16(%v8f16, %v8f16) #0
511 declare %v8f16 @llvm.exp.v8f16(%v8f16) #0
512 declare %v8f16 @llvm.exp2.v8f16(%v8f16) #0
513 declare %v8f16 @llvm.log.v8f16(%v8f16) #0
[all …]
H A Dfp16-vector-load-store.ll53 ; Load to one lane of v8f16
72 ; Simple store of v8f16
130 ; Store from one lane of v8f16
336 ; Load 2 x v8f16 with duplication
345 ; Load 3 x v8f16 with duplication
432 ; Load one lane of 2 x v8f16
441 ; Load one lane of 3 x v8f16
450 ; Load one lane of 8 x v8f16
459 ; Store one lane of 2 x v8f16
468 ; Store one lane of 3 x v8f16
[all …]
/dports/devel/llvm90/llvm-9.0.1.src/test/CodeGen/AArch64/
H A Darm64-vfloatintrinsics.ll326 %1 = call %v8f16 @llvm.pow.v8f16(%v8f16 %a, %v8f16 %b)
382 define %v8f16 @test_v8f16.fma(%v8f16 %a, %v8f16 %b, %v8f16 %c) {
391 %1 = call %v8f16 @llvm.fma.v8f16(%v8f16 %a, %v8f16 %b, %v8f16 %c)
506 declare %v8f16 @llvm.sqrt.v8f16(%v8f16) #0
508 declare %v8f16 @llvm.sin.v8f16(%v8f16) #0
509 declare %v8f16 @llvm.cos.v8f16(%v8f16) #0
510 declare %v8f16 @llvm.pow.v8f16(%v8f16, %v8f16) #0
511 declare %v8f16 @llvm.exp.v8f16(%v8f16) #0
512 declare %v8f16 @llvm.exp2.v8f16(%v8f16) #0
513 declare %v8f16 @llvm.log.v8f16(%v8f16) #0
[all …]
/dports/devel/llvm70/llvm-7.0.1.src/test/CodeGen/AArch64/
H A Darm64-vfloatintrinsics.ll37 %1 = call %v8f16 @llvm.sqrt.v8f16(%v8f16 %a)
113 define %v8f16 @test_v8f16.fma(%v8f16 %a, %v8f16 %b, %v8f16 %c) {
119 %1 = call %v8f16 @llvm.fma.v8f16(%v8f16 %a, %v8f16 %b, %v8f16 %c)
149 %1 = call %v8f16 @llvm.fabs.v8f16(%v8f16 %a)
303 declare %v8f16 @llvm.sqrt.v8f16(%v8f16) #0
317 declare %v8f16 @llvm.fma.v8f16(%v8f16, %v8f16, %v8f16) #0
321 declare %v8f16 @llvm.fabs.v8f16(%v8f16) #0
325 declare %v8f16 @llvm.floor.v8f16(%v8f16) #0
329 declare %v8f16 @llvm.ceil.v8f16(%v8f16) #0
333 declare %v8f16 @llvm.trunc.v8f16(%v8f16) #0
[all …]

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