Searched refs:v_packed_data_128 (Results 1 – 2 of 2) sorted by relevance
39 logic [127:0] v_packed_data_128; register126 v_packed_data_128 = {<<32{reg_in}};136 {<<32{reg_out}} = v_packed_data_128;158 v_packed_data_128 = {<<test_word{reg_in}};168 {<<test_word{reg_out}} = v_packed_data_128;180 v_packed_data_128 = 0;196 $display("TEST: v_packed_data_128=%0h", v_packed_data_128);235 …$display("v_packed_data_128=%0h, v_packed_data_128_ref=%0h", v_packed_data_128, v_packed_data_128_…265 …$display(" %s v_packed_data_128=%0h, v_packed_data_128_ref=%0h", name, v_packed_data_128, v_packed…327 …if (error_ == "") if (v_packed_data_128 !== v_packed_data_128_ref) error_ = "integer_vector_type r…
37 126 | v_packed_data_128 = {<<32{reg_in}};71 … ASSIGN expects 32 bits on the Assign RHS, but Assign RHS's VARREF 'v_packed_data_128' generates 1…73 136 | {<<32{reg_out}} = v_packed_data_128;