Searched refs:v_packed_data_128_ref (Results 1 – 1 of 1) sorted by relevance
| /dports/cad/verilator/verilator-4.216/test_regress/t/ |
| H A D | t_stream_integer_type.v | 40 logic [127:0] v_packed_data_128_ref; register
235 …play("v_packed_data_128=%0h, v_packed_data_128_ref=%0h", v_packed_data_128, v_packed_data_128_ref);
265 …v_packed_data_128=%0h, v_packed_data_128_ref=%0h", name, v_packed_data_128, v_packed_data_128_ref);
288 v_packed_data_128_ref = {reg_in[3], reg_in[2], reg_in[1], reg_in[0]};
327 …if (error_ == "") if (v_packed_data_128 !== v_packed_data_128_ref) error_ = "integer_vector_type r…
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