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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/PowerPC/
H A Dvcmp-fold.ll1 ; This should fold the "vcmpbfp." and "vcmpbfp" instructions into a single
2 ; "vcmpbfp.".
3 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -mcpu=g5 | grep vcmpbfp | count 1
10 …%tmp.upgrd.1 = call i32 @llvm.ppc.altivec.vcmpbfp.p( i32 1, <4 x float> %tmp, <4 x float> %tmp2 ) …
13 …%tmp.upgrd.2 = call <4 x i32> @llvm.ppc.altivec.vcmpbfp( <4 x float> %tmp4, <4 x float> %tmp6 ) ;…
20 declare i32 @llvm.ppc.altivec.vcmpbfp.p(i32, <4 x float>, <4 x float>)
22 declare <4 x i32> @llvm.ppc.altivec.vcmpbfp(<4 x float>, <4 x float>)
/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/PowerPC/
H A Dvcmp-fold.ll1 ; This should fold the "vcmpbfp." and "vcmpbfp" instructions into a single
2 ; "vcmpbfp.".
3 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -mcpu=g5 | grep vcmpbfp | count 1
10 …%tmp.upgrd.1 = call i32 @llvm.ppc.altivec.vcmpbfp.p( i32 1, <4 x float> %tmp, <4 x float> %tmp2 ) …
13 …%tmp.upgrd.2 = call <4 x i32> @llvm.ppc.altivec.vcmpbfp( <4 x float> %tmp4, <4 x float> %tmp6 ) ;…
20 declare i32 @llvm.ppc.altivec.vcmpbfp.p(i32, <4 x float>, <4 x float>)
22 declare <4 x i32> @llvm.ppc.altivec.vcmpbfp(<4 x float>, <4 x float>)
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/PowerPC/
H A Dvcmp-fold.ll1 ; This should fold the "vcmpbfp." and "vcmpbfp" instructions into a single
2 ; "vcmpbfp.".
3 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -mcpu=g5 | grep vcmpbfp | count 1
10 …%tmp.upgrd.1 = call i32 @llvm.ppc.altivec.vcmpbfp.p( i32 1, <4 x float> %tmp, <4 x float> %tmp2 ) …
13 …%tmp.upgrd.2 = call <4 x i32> @llvm.ppc.altivec.vcmpbfp( <4 x float> %tmp4, <4 x float> %tmp6 ) ;…
20 declare i32 @llvm.ppc.altivec.vcmpbfp.p(i32, <4 x float>, <4 x float>)
22 declare <4 x i32> @llvm.ppc.altivec.vcmpbfp(<4 x float>, <4 x float>)
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/PowerPC/
H A Dvcmp-fold.ll1 ; This should fold the "vcmpbfp." and "vcmpbfp" instructions into a single
2 ; "vcmpbfp.".
3 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -mcpu=g5 | grep vcmpbfp | count 1
10 …%tmp.upgrd.1 = call i32 @llvm.ppc.altivec.vcmpbfp.p( i32 1, <4 x float> %tmp, <4 x float> %tmp2 ) …
13 …%tmp.upgrd.2 = call <4 x i32> @llvm.ppc.altivec.vcmpbfp( <4 x float> %tmp4, <4 x float> %tmp6 ) ;…
20 declare i32 @llvm.ppc.altivec.vcmpbfp.p(i32, <4 x float>, <4 x float>)
22 declare <4 x i32> @llvm.ppc.altivec.vcmpbfp(<4 x float>, <4 x float>)
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/PowerPC/
H A Dvcmp-fold.ll1 ; This should fold the "vcmpbfp." and "vcmpbfp" instructions into a single
2 ; "vcmpbfp.".
3 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -mcpu=g5 | grep vcmpbfp | count 1
10 …%tmp.upgrd.1 = call i32 @llvm.ppc.altivec.vcmpbfp.p( i32 1, <4 x float> %tmp, <4 x float> %tmp2 ) …
13 …%tmp.upgrd.2 = call <4 x i32> @llvm.ppc.altivec.vcmpbfp( <4 x float> %tmp4, <4 x float> %tmp6 ) ;…
20 declare i32 @llvm.ppc.altivec.vcmpbfp.p(i32, <4 x float>, <4 x float>)
22 declare <4 x i32> @llvm.ppc.altivec.vcmpbfp(<4 x float>, <4 x float>)
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/PowerPC/
H A Dvcmp-fold.ll1 ; This should fold the "vcmpbfp." and "vcmpbfp" instructions into a single
2 ; "vcmpbfp.".
3 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -mcpu=g5 | grep vcmpbfp | count 1
10 …%tmp.upgrd.1 = call i32 @llvm.ppc.altivec.vcmpbfp.p( i32 1, <4 x float> %tmp, <4 x float> %tmp2 ) …
13 …%tmp.upgrd.2 = call <4 x i32> @llvm.ppc.altivec.vcmpbfp( <4 x float> %tmp4, <4 x float> %tmp6 ) ;…
20 declare i32 @llvm.ppc.altivec.vcmpbfp.p(i32, <4 x float>, <4 x float>)
22 declare <4 x i32> @llvm.ppc.altivec.vcmpbfp(<4 x float>, <4 x float>)
/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/PowerPC/
H A Dvcmp-fold.ll1 ; This should fold the "vcmpbfp." and "vcmpbfp" instructions into a single
2 ; "vcmpbfp.".
3 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -mcpu=g5 | grep vcmpbfp | count 1
10 …%tmp.upgrd.1 = call i32 @llvm.ppc.altivec.vcmpbfp.p( i32 1, <4 x float> %tmp, <4 x float> %tmp2 ) …
13 …%tmp.upgrd.2 = call <4 x i32> @llvm.ppc.altivec.vcmpbfp( <4 x float> %tmp4, <4 x float> %tmp6 ) ;…
20 declare i32 @llvm.ppc.altivec.vcmpbfp.p(i32, <4 x float>, <4 x float>)
22 declare <4 x i32> @llvm.ppc.altivec.vcmpbfp(<4 x float>, <4 x float>)
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/PowerPC/
H A Dvcmp-fold.ll1 ; This should fold the "vcmpbfp." and "vcmpbfp" instructions into a single
2 ; "vcmpbfp.".
3 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -mcpu=g5 | grep vcmpbfp | count 1
10 …%tmp.upgrd.1 = call i32 @llvm.ppc.altivec.vcmpbfp.p( i32 1, <4 x float> %tmp, <4 x float> %tmp2 ) …
13 …%tmp.upgrd.2 = call <4 x i32> @llvm.ppc.altivec.vcmpbfp( <4 x float> %tmp4, <4 x float> %tmp6 ) ;…
20 declare i32 @llvm.ppc.altivec.vcmpbfp.p(i32, <4 x float>, <4 x float>)
22 declare <4 x i32> @llvm.ppc.altivec.vcmpbfp(<4 x float>, <4 x float>)
/dports/devel/llvm90/llvm-9.0.1.src/test/CodeGen/PowerPC/
H A Dvcmp-fold.ll1 ; This should fold the "vcmpbfp." and "vcmpbfp" instructions into a single
2 ; "vcmpbfp.".
3 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -mcpu=g5 | grep vcmpbfp | count 1
10 …%tmp.upgrd.1 = call i32 @llvm.ppc.altivec.vcmpbfp.p( i32 1, <4 x float> %tmp, <4 x float> %tmp2 ) …
13 …%tmp.upgrd.2 = call <4 x i32> @llvm.ppc.altivec.vcmpbfp( <4 x float> %tmp4, <4 x float> %tmp6 ) ;…
20 declare i32 @llvm.ppc.altivec.vcmpbfp.p(i32, <4 x float>, <4 x float>)
22 declare <4 x i32> @llvm.ppc.altivec.vcmpbfp(<4 x float>, <4 x float>)
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/PowerPC/
H A Dvcmp-fold.ll1 ; This should fold the "vcmpbfp." and "vcmpbfp" instructions into a single
2 ; "vcmpbfp.".
3 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -mcpu=g5 | grep vcmpbfp | count 1
10 …%tmp.upgrd.1 = call i32 @llvm.ppc.altivec.vcmpbfp.p( i32 1, <4 x float> %tmp, <4 x float> %tmp2 ) …
13 …%tmp.upgrd.2 = call <4 x i32> @llvm.ppc.altivec.vcmpbfp( <4 x float> %tmp4, <4 x float> %tmp6 ) ;…
20 declare i32 @llvm.ppc.altivec.vcmpbfp.p(i32, <4 x float>, <4 x float>)
22 declare <4 x i32> @llvm.ppc.altivec.vcmpbfp(<4 x float>, <4 x float>)
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/PowerPC/
H A Dvcmp-fold.ll1 ; This should fold the "vcmpbfp." and "vcmpbfp" instructions into a single
2 ; "vcmpbfp.".
3 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -mcpu=g5 | grep vcmpbfp | count 1
10 …%tmp.upgrd.1 = call i32 @llvm.ppc.altivec.vcmpbfp.p( i32 1, <4 x float> %tmp, <4 x float> %tmp2 ) …
13 …%tmp.upgrd.2 = call <4 x i32> @llvm.ppc.altivec.vcmpbfp( <4 x float> %tmp4, <4 x float> %tmp6 ) ;…
20 declare i32 @llvm.ppc.altivec.vcmpbfp.p(i32, <4 x float>, <4 x float>)
22 declare <4 x i32> @llvm.ppc.altivec.vcmpbfp(<4 x float>, <4 x float>)
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/PowerPC/
H A Dvcmp-fold.ll1 ; This should fold the "vcmpbfp." and "vcmpbfp" instructions into a single
2 ; "vcmpbfp.".
3 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -mcpu=g5 | grep vcmpbfp | count 1
10 …%tmp.upgrd.1 = call i32 @llvm.ppc.altivec.vcmpbfp.p( i32 1, <4 x float> %tmp, <4 x float> %tmp2 ) …
13 …%tmp.upgrd.2 = call <4 x i32> @llvm.ppc.altivec.vcmpbfp( <4 x float> %tmp4, <4 x float> %tmp6 ) ;…
20 declare i32 @llvm.ppc.altivec.vcmpbfp.p(i32, <4 x float>, <4 x float>)
22 declare <4 x i32> @llvm.ppc.altivec.vcmpbfp(<4 x float>, <4 x float>)
/dports/devel/llvm80/llvm-8.0.1.src/test/CodeGen/PowerPC/
H A Dvcmp-fold.ll1 ; This should fold the "vcmpbfp." and "vcmpbfp" instructions into a single
2 ; "vcmpbfp.".
3 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -mcpu=g5 | grep vcmpbfp | count 1
10 …%tmp.upgrd.1 = call i32 @llvm.ppc.altivec.vcmpbfp.p( i32 1, <4 x float> %tmp, <4 x float> %tmp2 ) …
13 …%tmp.upgrd.2 = call <4 x i32> @llvm.ppc.altivec.vcmpbfp( <4 x float> %tmp4, <4 x float> %tmp6 ) ;…
20 declare i32 @llvm.ppc.altivec.vcmpbfp.p(i32, <4 x float>, <4 x float>)
22 declare <4 x i32> @llvm.ppc.altivec.vcmpbfp(<4 x float>, <4 x float>)
/dports/devel/llvm70/llvm-7.0.1.src/test/CodeGen/PowerPC/
H A Dvcmp-fold.ll1 ; This should fold the "vcmpbfp." and "vcmpbfp" instructions into a single
2 ; "vcmpbfp.".
3 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -mcpu=g5 | grep vcmpbfp | count 1
10 …%tmp.upgrd.1 = call i32 @llvm.ppc.altivec.vcmpbfp.p( i32 1, <4 x float> %tmp, <4 x float> %tmp2 ) …
13 …%tmp.upgrd.2 = call <4 x i32> @llvm.ppc.altivec.vcmpbfp( <4 x float> %tmp4, <4 x float> %tmp6 ) ;…
20 declare i32 @llvm.ppc.altivec.vcmpbfp.p(i32, <4 x float>, <4 x float>)
22 declare <4 x i32> @llvm.ppc.altivec.vcmpbfp(<4 x float>, <4 x float>)
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/PowerPC/
H A Dvcmp-fold.ll1 ; This should fold the "vcmpbfp." and "vcmpbfp" instructions into a single
2 ; "vcmpbfp.".
3 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -mcpu=g5 | grep vcmpbfp | count 1
10 …%tmp.upgrd.1 = call i32 @llvm.ppc.altivec.vcmpbfp.p( i32 1, <4 x float> %tmp, <4 x float> %tmp2 ) …
13 …%tmp.upgrd.2 = call <4 x i32> @llvm.ppc.altivec.vcmpbfp( <4 x float> %tmp4, <4 x float> %tmp6 ) ;…
20 declare i32 @llvm.ppc.altivec.vcmpbfp.p(i32, <4 x float>, <4 x float>)
22 declare <4 x i32> @llvm.ppc.altivec.vcmpbfp(<4 x float>, <4 x float>)
/dports/devel/valgrind/valgrind-dragonfly-dragonfly/none/tests/ppc32/
H A Djm-vmx.stdout.exp_Minus_nan2932 vcmpbfp: => 00000000 00000000 00000000 00000000 (00000000)
2934 vcmpbfp: => c0000000 c0000000 c0000000 c0000000 (00000000)
2936 vcmpbfp: => 00000000 00000000 00000000 00000000 (00000000)
2938 vcmpbfp: => c0000000 c0000000 c0000000 c0000000 (00000000)
2940 vcmpbfp: => 80000000 80000000 80000000 80000000 (00000000)
2942 vcmpbfp: => 80000000 80000000 80000000 80000000 (00000000)
2944 vcmpbfp: => 00000000 00000000 00000000 00000000 (00000000)
2946 vcmpbfp: => c0000000 c0000000 c0000000 c0000000 (00000000)
2948 vcmpbfp: => 00000000 00000000 00000000 00000000 (00000000)
2950 vcmpbfp: => c0000000 c0000000 c0000000 c0000000 (00000000)
[all …]
/dports/devel/valgrind/valgrind-dragonfly-dragonfly/none/tests/ppc64/
H A Djm-vmx.stdout.exp-LE2932 vcmpbfp: => 00000000 00000000 00000000 00000000 (00000000)
2934 vcmpbfp: => c0000000 c0000000 c0000000 c0000000 (00000000)
2936 vcmpbfp: => 00000000 00000000 00000000 00000000 (00000000)
2938 vcmpbfp: => c0000000 c0000000 c0000000 c0000000 (00000000)
2940 vcmpbfp: => 80000000 80000000 80000000 80000000 (00000000)
2942 vcmpbfp: => 80000000 80000000 80000000 80000000 (00000000)
2944 vcmpbfp: => 00000000 00000000 00000000 00000000 (00000000)
2946 vcmpbfp: => c0000000 c0000000 c0000000 c0000000 (00000000)
2948 vcmpbfp: => 00000000 00000000 00000000 00000000 (00000000)
2950 vcmpbfp: => c0000000 c0000000 c0000000 c0000000 (00000000)
[all …]
H A Djm-vmx.stdout.exp_Minus_nan2932 vcmpbfp: => 00000000 00000000 00000000 00000000 (00000000)
2934 vcmpbfp: => c0000000 c0000000 c0000000 c0000000 (00000000)
2936 vcmpbfp: => 00000000 00000000 00000000 00000000 (00000000)
2938 vcmpbfp: => c0000000 c0000000 c0000000 c0000000 (00000000)
2940 vcmpbfp: => 80000000 80000000 80000000 80000000 (00000000)
2942 vcmpbfp: => 80000000 80000000 80000000 80000000 (00000000)
2944 vcmpbfp: => 00000000 00000000 00000000 00000000 (00000000)
2946 vcmpbfp: => c0000000 c0000000 c0000000 c0000000 (00000000)
2948 vcmpbfp: => 00000000 00000000 00000000 00000000 (00000000)
2950 vcmpbfp: => c0000000 c0000000 c0000000 c0000000 (00000000)
[all …]
/dports/devel/valgrind-lts/valgrind-dragonfly-dragonfly/none/tests/ppc32/
H A Djm-vmx.stdout.exp_Minus_nan2932 vcmpbfp: => 00000000 00000000 00000000 00000000 (00000000)
2934 vcmpbfp: => c0000000 c0000000 c0000000 c0000000 (00000000)
2936 vcmpbfp: => 00000000 00000000 00000000 00000000 (00000000)
2938 vcmpbfp: => c0000000 c0000000 c0000000 c0000000 (00000000)
2940 vcmpbfp: => 80000000 80000000 80000000 80000000 (00000000)
2942 vcmpbfp: => 80000000 80000000 80000000 80000000 (00000000)
2944 vcmpbfp: => 00000000 00000000 00000000 00000000 (00000000)
2946 vcmpbfp: => c0000000 c0000000 c0000000 c0000000 (00000000)
2948 vcmpbfp: => 00000000 00000000 00000000 00000000 (00000000)
2950 vcmpbfp: => c0000000 c0000000 c0000000 c0000000 (00000000)
[all …]
/dports/devel/valgrind-lts/valgrind-dragonfly-dragonfly/none/tests/ppc64/
H A Djm-vmx.stdout.exp-LE2932 vcmpbfp: => 00000000 00000000 00000000 00000000 (00000000)
2934 vcmpbfp: => c0000000 c0000000 c0000000 c0000000 (00000000)
2936 vcmpbfp: => 00000000 00000000 00000000 00000000 (00000000)
2938 vcmpbfp: => c0000000 c0000000 c0000000 c0000000 (00000000)
2940 vcmpbfp: => 80000000 80000000 80000000 80000000 (00000000)
2942 vcmpbfp: => 80000000 80000000 80000000 80000000 (00000000)
2944 vcmpbfp: => 00000000 00000000 00000000 00000000 (00000000)
2946 vcmpbfp: => c0000000 c0000000 c0000000 c0000000 (00000000)
2948 vcmpbfp: => 00000000 00000000 00000000 00000000 (00000000)
2950 vcmpbfp: => c0000000 c0000000 c0000000 c0000000 (00000000)
[all …]
H A Djm-vmx.stdout.exp_Minus_nan2932 vcmpbfp: => 00000000 00000000 00000000 00000000 (00000000)
2934 vcmpbfp: => c0000000 c0000000 c0000000 c0000000 (00000000)
2936 vcmpbfp: => 00000000 00000000 00000000 00000000 (00000000)
2938 vcmpbfp: => c0000000 c0000000 c0000000 c0000000 (00000000)
2940 vcmpbfp: => 80000000 80000000 80000000 80000000 (00000000)
2942 vcmpbfp: => 80000000 80000000 80000000 80000000 (00000000)
2944 vcmpbfp: => 00000000 00000000 00000000 00000000 (00000000)
2946 vcmpbfp: => c0000000 c0000000 c0000000 c0000000 (00000000)
2948 vcmpbfp: => 00000000 00000000 00000000 00000000 (00000000)
2950 vcmpbfp: => c0000000 c0000000 c0000000 c0000000 (00000000)
[all …]
/dports/devel/capstone4/capstone-4.0.2/suite/MC/PowerPC/
H A Dppc64-encoding-vmx.s.cs157 0x10,0x43,0x23,0xc6 = vcmpbfp 2, 3, 4
158 0x10,0x43,0x27,0xc6 = vcmpbfp. 2, 3, 4
/dports/devel/capstone3/capstone-3.0.5/suite/MC/PowerPC/
H A Dppc64-encoding-vmx.s.cs157 0x10,0x43,0x23,0xc6 = vcmpbfp 2, 3, 4
158 0x10,0x43,0x27,0xc6 = vcmpbfp. 2, 3, 4
/dports/emulators/qemu/qemu-6.2.0/capstone/suite/MC/PowerPC/
H A Dppc64-encoding-vmx.s.cs157 0x10,0x43,0x23,0xc6 = vcmpbfp 2, 3, 4
158 0x10,0x43,0x27,0xc6 = vcmpbfp. 2, 3, 4
/dports/emulators/qemu42/qemu-4.2.1/capstone/suite/MC/PowerPC/
H A Dppc64-encoding-vmx.s.cs157 0x10,0x43,0x23,0xc6 = vcmpbfp 2, 3, 4
158 0x10,0x43,0x27,0xc6 = vcmpbfp. 2, 3, 4

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