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/dports/devel/lattice-ice40-examples-hx1k/iCE40HX1K-EVB-69df5a7fc2daa8f00a984426b721499f6df22492/windows/ice40blinkingled/ice40blinkingled_Implmnt/synlog/
H A Dice40blinkingled_multi_srs_gen.srr2 @N|Running in 32-bit mode
4 …ice40blinkingled_rtl.v":1:7:1:17|Selected library: work cell: led_but_ex1 view verilog as top level
5 …ice40blinkingled_rtl.v":1:7:1:17|Selected library: work cell: led_but_ex1 view verilog as top level
H A Dice40blinkingled_compiler.srr2 @N|Running in 32-bit mode
6 @N|Running in 32-bit mode
28 @N|Running in 32-bit mode
29 …ice40blinkingled_rtl.v":1:7:1:17|Selected library: work cell: led_but_ex1 view verilog as top level
30 …ice40blinkingled_rtl.v":1:7:1:17|Selected library: work cell: led_but_ex1 view verilog as top level
/dports/cad/yosys/yosys-yosys-0.12/manual/CHAPTER_StateOfTheArt/
H A Dsynth.sh17 for mode in $all_modes; do
19 echo "synth.sh $mode $src.v ${src}_${mode}.v"
20 …( set -x; bash synth.sh $mode $src.v ${src}_${mode}.v || rm -f ${src}_${mode}.v; ) > ${src}_${mode…
26 mode="$1"
43 case "$mode" in
55 $netgen -ofmt verilog $prefix.ngo $prefix.v
/dports/editors/emacs-devel/emacs-4d1968b/lisp/
H A DChangeLog.142089 * progmodes/verilog-mode.el (verilog-mode): Avoid circular use of
12669 (verilog-mode-release-date, verilog-mode-version)
16716 * progmodes/verilog-mode.el (verilog-auto-output)
18167 * progmodes/verilog-mode.el (verilog-mode):
19469 (verilog-mode-version, verilog-mode-release-date): Update.
19903 (verilog-mode, verilog-mode-indent, verilog-mode-actions)
19904 (verilog-mode-auto, verilog-indent-level-module)
19909 (verilog-set-compile-command, verilog-mode-syntax-table, verilog-mode)
19921 (verilog-mode-version, verilog-mode-release-date)
19922 (verilog-mode-release-emacs, verilog-linter, verilog-coverage)
[all …]
H A DChangeLog.153204 * progmodes/verilog-mode.el (verilog-mode):
4499 * progmodes/verilog-mode.el (verilog-get-beg-of-line)
5170 * progmodes/verilog-mode.el (verilog-auto-inst, verilog-gate-ios)
5194 (verilog-mode-map, verilog-preprocess, verilog-preprocess-history)
11950 * progmodes/verilog-mode.el (verilog-forward-sexp):
14217 * progmodes/verilog-mode.el (verilog-vmm-begin-re, verilog-vmm-end-re)
14225 * progmodes/verilog-mode.el (verilog-auto-lineup)
16566 * progmodes/verilog-mode.el (verilog-getopt-file, verilog-set-define):
20051 * progmodes/verilog-mode.el (verilog-surelint-off):
21687 * progmodes/verilog-mode.el (verilog-auto-inst, verilog-auto):
[all …]
H A DChangeLog.132992 * progmodes/verilog-mode.el (verilog-sk-prompt-msb)
3532 * progmodes/verilog-mode.el (verilog-mode-map): Don't bind C-M-a,
3544 * progmodes/verilog-mode.el (verilog-booleanp): New function for
3555 (verilog-mode-version, verilog-mode-release-date):
3591 (verilog-forward-sexp, verilog-font-lock-init, verilog-mode)
3624 (verilog-auto, verilog-sk-define-signal, verilog-mode-mouse-map)
5438 * progmodes/verilog-mode.el (verilog-mode-map)
5439 (verilog-template-map, verilog-mode-mouse-map): Fix typos.
5451 * progmodes/verilog-mode.el (verilog-string-replace-matches)
5460 * progmodes/verilog-mode.el (verilog-mode-version)
[all …]
H A DChangeLog.165181 * progmodes/verilog-mode.el (verilog-auto-template-warn-unused)
5850 * progmodes/verilog-mode.el (verilog-mode-release-emacs): Fix last
5896 * progmodes/verilog-mode.el (verilog-auto-ascii-enum)
6478 * progmodes/verilog-mode.el (verilog-read-defines):
12546 * progmodes/verilog-mode.el (verilog-mode):
12562 * progmodes/verilog-mode.el (verilog-mode): Check whether
14512 * progmodes/verilog-mode.el (verilog-auto-declare-nettype)
15917 * progmodes/verilog-mode.el (verilog-pretty-expr):
16195 * progmodes/verilog-mode.el (verilog-batch-indent):
16580 * progmodes/verilog-mode.el (verilog-backward-token):
[all …]
H A DChangeLog.171480 * progmodes/verilog-mode.el (verilog-mode-version): Update.
4319 * progmodes/verilog-mode.el (verilog-mode-version): Update.
6812 * progmodes/verilog-mode.el (verilog-mode-version): Bump.
10135 * progmodes/verilog-mode.el (verilog-mode-version): Bump.
11916 * progmodes/verilog-mode.el (verilog-mode-version): Update.
16523 * progmodes/verilog-mode.el (verilog-end-of-defun)
17450 * progmodes/verilog-mode.el (verilog-mode): Don't set
17523 * progmodes/verilog-mode.el (verilog-mode-version): Update.
17530 (verilog-scan-cache-preserving, verilog-mode, verilog-at-struct-p)
20370 * progmodes/verilog-mode.el (verilog-point-text):
[all …]
/dports/editors/emacs/emacs-27.2/lisp/
H A DChangeLog.142089 * progmodes/verilog-mode.el (verilog-mode): Avoid circular use of
12669 (verilog-mode-release-date, verilog-mode-version)
16716 * progmodes/verilog-mode.el (verilog-auto-output)
18167 * progmodes/verilog-mode.el (verilog-mode):
19469 (verilog-mode-version, verilog-mode-release-date): Update.
19903 (verilog-mode, verilog-mode-indent, verilog-mode-actions)
19904 (verilog-mode-auto, verilog-indent-level-module)
19909 (verilog-set-compile-command, verilog-mode-syntax-table, verilog-mode)
19921 (verilog-mode-version, verilog-mode-release-date)
19922 (verilog-mode-release-emacs, verilog-linter, verilog-coverage)
[all …]
H A DChangeLog.153204 * progmodes/verilog-mode.el (verilog-mode):
4499 * progmodes/verilog-mode.el (verilog-get-beg-of-line)
5170 * progmodes/verilog-mode.el (verilog-auto-inst, verilog-gate-ios)
5194 (verilog-mode-map, verilog-preprocess, verilog-preprocess-history)
11950 * progmodes/verilog-mode.el (verilog-forward-sexp):
14217 * progmodes/verilog-mode.el (verilog-vmm-begin-re, verilog-vmm-end-re)
14225 * progmodes/verilog-mode.el (verilog-auto-lineup)
16566 * progmodes/verilog-mode.el (verilog-getopt-file, verilog-set-define):
20051 * progmodes/verilog-mode.el (verilog-surelint-off):
21687 * progmodes/verilog-mode.el (verilog-auto-inst, verilog-auto):
[all …]
H A DChangeLog.132992 * progmodes/verilog-mode.el (verilog-sk-prompt-msb)
3532 * progmodes/verilog-mode.el (verilog-mode-map): Don't bind C-M-a,
3544 * progmodes/verilog-mode.el (verilog-booleanp): New function for
3555 (verilog-mode-version, verilog-mode-release-date):
3591 (verilog-forward-sexp, verilog-font-lock-init, verilog-mode)
3624 (verilog-auto, verilog-sk-define-signal, verilog-mode-mouse-map)
5438 * progmodes/verilog-mode.el (verilog-mode-map)
5439 (verilog-template-map, verilog-mode-mouse-map): Fix typos.
5451 * progmodes/verilog-mode.el (verilog-string-replace-matches)
5460 * progmodes/verilog-mode.el (verilog-mode-version)
[all …]
H A DChangeLog.165181 * progmodes/verilog-mode.el (verilog-auto-template-warn-unused)
5850 * progmodes/verilog-mode.el (verilog-mode-release-emacs): Fix last
5896 * progmodes/verilog-mode.el (verilog-auto-ascii-enum)
6478 * progmodes/verilog-mode.el (verilog-read-defines):
12546 * progmodes/verilog-mode.el (verilog-mode):
12562 * progmodes/verilog-mode.el (verilog-mode): Check whether
14512 * progmodes/verilog-mode.el (verilog-auto-declare-nettype)
15917 * progmodes/verilog-mode.el (verilog-pretty-expr):
16195 * progmodes/verilog-mode.el (verilog-batch-indent):
16580 * progmodes/verilog-mode.el (verilog-backward-token):
[all …]
/dports/cad/verilog-mode.el/
H A D.license-catalog.mk5 _LICENSE_DISTFILES=verilog-mode-801.el.gz
/dports/cad/verilator/verilator-4.216/docs/guide/
H A Dextensions.rst84 Take remaining text up to the next :option:`\`verilog` or
85 :option:`\`systemc_... <\`systemc_header>` mode switch and place it
92 Take remaining text up to the next :option:`\`verilog` or
93 :option:`\`systemc_... <\`systemc_header>` mode switch and place it
100 Take remaining text up to the next :option:`\`verilog` or
108 Take remaining text up to the next :option:`\`verilog` or
116 Take remaining text up to the next :option:`\`verilog` or
124 Take remaining text up to the next :option:`\`verilog` or
151 Take remaining text up to the next :option:`\`verilog` mode switch and
154 .. option:: `verilog
[all …]
/dports/cad/cascade-compiler/cascade-f4f7ae8bd1dd379790c0e58c286df90b8d1cdcde/
H A DREADME.md96 ```verilog
106 ```verilog
111 ```verilog
123 ```verilog
136 ```verilog
149 ```verilog
163 ```verilog
168 ```verilog
289 ```verilog
514 | File I/O | $fopen(path, mode) | x | | |
[all …]
/dports/editors/le/le-1.16.6/misc/
H A Dsyntax32 # This file mode
41 # C language mode (lav)
45 # C++ mode (lav)
82 # po (i18n) mode (lav)
134 # Patch mode, by Serge Vakulenko <vak@cronyx.ru>
153 /*.v|/-\*- *verilog *-\*-
154 i=verilog
193 # lsm mode, by Raphael Geissert <atomo64@gmail.com>
258 # OCaml mode, by Raphael Geissert <atomo64@gmail.com>
269 # git commit message mode
[all …]
/dports/chinese/enscript/enscript-1.6.6/states/hl/
H A Dverilog.st2 * Name: verilog
7 state verilog extends HighlightEntry
102 mode: c
/dports/print/enscript-letterdj/enscript-1.6.6/states/hl/
H A Dverilog.st2 * Name: verilog
7 state verilog extends HighlightEntry
102 mode: c
/dports/print/enscript-letter/enscript-1.6.6/states/hl/
H A Dverilog.st2 * Name: verilog
7 state verilog extends HighlightEntry
102 mode: c
/dports/print/enscript-a4/enscript-1.6.6/states/hl/
H A Dverilog.st2 * Name: verilog
7 state verilog extends HighlightEntry
102 mode: c
/dports/cad/p5-Verilog-Perl/Verilog-Perl-3.478/
H A DREADME15 For general information see <https://www.veripool.org/verilog-perl>.
20 <https://www.veripool.org/verilog-mode> Verilog-Mode.
206 man verilog-perl
262 <https://www.veripool.org/verilog-perl>.
289 And the <https://www.veripool.org/verilog-mode>Verilog-Mode package for
H A DREADME.pod16 For general information see L<https://www.veripool.org/verilog-perl>.
21 L<https://www.veripool.org/verilog-mode> Verilog-Mode.
239 man verilog-perl
299 L<https://www.veripool.org/verilog-perl>.
338 And the L<https://www.veripool.org/verilog-mode>Verilog-Mode package for Emacs.
/dports/devel/lattice-ice40-examples-hx1k/iCE40HX1K-EVB-69df5a7fc2daa8f00a984426b721499f6df22492/windows/ice40blinkingled/ice40blinkingled_Implmnt/
H A Dice40blinkingled.srr9 @N|Running in 32-bit mode
13 @N|Running in 32-bit mode
35 @N|Running in 32-bit mode
36 …ice40blinkingled_rtl.v":1:7:1:17|Selected library: work cell: led_but_ex1 view verilog as top level
37 …ice40blinkingled_rtl.v":1:7:1:17|Selected library: work cell: led_but_ex1 view verilog as top level
54 @N|Running in 32-bit mode
76 @N: MF249 |Running in 32-bit mode.
128 @N: MF249 |Running in 32-bit mode.
150 @N: MT204 |Auto Constrain mode is disabled because clocks are defined in the SDC file
237 Wire load mode: top
[all …]
/dports/cad/tkgate/tkgate-2.1/
H A DREADME.verga5 $script <file> Read a verilog script file
22 $go Put simulator in continuos mode.
/dports/lang/mit-scheme/mit-scheme-9.2/src/edwin/
H A D.edwin-ffi51 ("c-mode" (edwin))
184 ("verilog" (edwin verilog))

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