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Searched refs:vr_offs (Results 1 – 18 of 18) sorted by relevance

/dports/multimedia/gstreamer1-plugins-rust/gst-plugins-rs-d0466b3eee114207f851b37cae0015c0e718f021/cargo-crates/va_list-0.1.3/src/
H A Dimpl-aarch64-elf.rs15 vr_offs: i32, field
35 let rv = ptr::read((self.vr_top as usize - self.vr_offs.abs() as usize) as *const _); in get_vr()
36 self.vr_offs += 16; in get_vr()
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/AArch64/
H A Darm64-big-endian-varargs.ll25 %vr_offs = load i32, i32* %vr_offs_p, align 4
26 %0 = icmp sgt i32 %vr_offs, -1
30 %new_reg_offs = add i32 %vr_offs, 16
38 %1 = sext i32 %vr_offs to i64
/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/AArch64/
H A Darm64-big-endian-varargs.ll25 %vr_offs = load i32, i32* %vr_offs_p, align 4
26 %0 = icmp sgt i32 %vr_offs, -1
30 %new_reg_offs = add i32 %vr_offs, 16
38 %1 = sext i32 %vr_offs to i64
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AArch64/
H A Darm64-big-endian-varargs.ll25 %vr_offs = load i32, i32* %vr_offs_p, align 4
26 %0 = icmp sgt i32 %vr_offs, -1
30 %new_reg_offs = add i32 %vr_offs, 16
38 %1 = sext i32 %vr_offs to i64
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/AArch64/
H A Darm64-big-endian-varargs.ll25 %vr_offs = load i32, i32* %vr_offs_p, align 4
26 %0 = icmp sgt i32 %vr_offs, -1
30 %new_reg_offs = add i32 %vr_offs, 16
38 %1 = sext i32 %vr_offs to i64
/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/AArch64/
H A Darm64-big-endian-varargs.ll25 %vr_offs = load i32, i32* %vr_offs_p, align 4
26 %0 = icmp sgt i32 %vr_offs, -1
30 %new_reg_offs = add i32 %vr_offs, 16
38 %1 = sext i32 %vr_offs to i64
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AArch64/
H A Darm64-big-endian-varargs.ll25 %vr_offs = load i32, i32* %vr_offs_p, align 4
26 %0 = icmp sgt i32 %vr_offs, -1
30 %new_reg_offs = add i32 %vr_offs, 16
38 %1 = sext i32 %vr_offs to i64
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/AArch64/
H A Darm64-big-endian-varargs.ll25 %vr_offs = load i32, i32* %vr_offs_p, align 4
26 %0 = icmp sgt i32 %vr_offs, -1
30 %new_reg_offs = add i32 %vr_offs, 16
38 %1 = sext i32 %vr_offs to i64
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/AArch64/
H A Darm64-big-endian-varargs.ll25 %vr_offs = load i32, i32* %vr_offs_p, align 4
26 %0 = icmp sgt i32 %vr_offs, -1
30 %new_reg_offs = add i32 %vr_offs, 16
38 %1 = sext i32 %vr_offs to i64
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/AArch64/
H A Darm64-big-endian-varargs.ll25 %vr_offs = load i32, i32* %vr_offs_p, align 4
26 %0 = icmp sgt i32 %vr_offs, -1
30 %new_reg_offs = add i32 %vr_offs, 16
38 %1 = sext i32 %vr_offs to i64
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/AArch64/
H A Darm64-big-endian-varargs.ll25 %vr_offs = load i32, i32* %vr_offs_p, align 4
26 %0 = icmp sgt i32 %vr_offs, -1
30 %new_reg_offs = add i32 %vr_offs, 16
38 %1 = sext i32 %vr_offs to i64
/dports/devel/llvm90/llvm-9.0.1.src/test/CodeGen/AArch64/
H A Darm64-big-endian-varargs.ll25 %vr_offs = load i32, i32* %vr_offs_p, align 4
26 %0 = icmp sgt i32 %vr_offs, -1
30 %new_reg_offs = add i32 %vr_offs, 16
38 %1 = sext i32 %vr_offs to i64
/dports/devel/llvm80/llvm-8.0.1.src/test/CodeGen/AArch64/
H A Darm64-big-endian-varargs.ll25 %vr_offs = load i32, i32* %vr_offs_p, align 4
26 %0 = icmp sgt i32 %vr_offs, -1
30 %new_reg_offs = add i32 %vr_offs, 16
38 %1 = sext i32 %vr_offs to i64
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/AArch64/
H A Darm64-big-endian-varargs.ll25 %vr_offs = load i32, i32* %vr_offs_p, align 4
26 %0 = icmp sgt i32 %vr_offs, -1
30 %new_reg_offs = add i32 %vr_offs, 16
38 %1 = sext i32 %vr_offs to i64
/dports/devel/llvm70/llvm-7.0.1.src/test/CodeGen/AArch64/
H A Darm64-big-endian-varargs.ll25 %vr_offs = load i32, i32* %vr_offs_p, align 4
26 %0 = icmp sgt i32 %vr_offs, -1
30 %new_reg_offs = add i32 %vr_offs, 16
38 %1 = sext i32 %vr_offs to i64
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/AArch64/
H A Darm64-big-endian-varargs.ll25 %vr_offs = load i32, i32* %vr_offs_p, align 4
26 %0 = icmp sgt i32 %vr_offs, -1
30 %new_reg_offs = add i32 %vr_offs, 16
38 %1 = sext i32 %vr_offs to i64
/dports/lang/rust/rustc-1.58.1-src/library/core/src/
H A Dffi.rs128 vr_offs: i32, field
/dports/editors/libreoffice6/libreoffice-6.4.7.2/bridges/source/cpp_uno/gcc3_linux_aarch64/
H A Dcpp2uno.cxx312 int vr_offs; member