/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/hw/i386/ |
H A D | amd_iommu.c | 74 uint64_t romask, uint64_t w1cmask) in amdvi_set_quad() argument 78 stq_le_p(&s->w1cmask[addr], w1cmask); in amdvi_set_quad() 106 uint16_t w1cmask = lduw_le_p(&s->w1cmask[addr]); in amdvi_writew() local 109 ((oldval & romask) | (val & ~romask)) & ~(val & w1cmask)); in amdvi_writew() 115 uint32_t w1cmask = ldl_le_p(&s->w1cmask[addr]); in amdvi_writel() local 118 ((oldval & romask) | (val & ~romask)) & ~(val & w1cmask)); in amdvi_writel() 124 uint64_t w1cmask = ldq_le_p(&s->w1cmask[addr]); in amdvi_writeq() local 127 ((oldval & romask) | (val & ~romask)) & ~(val & w1cmask)); in amdvi_writeq()
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/dports/emulators/qemu42/qemu-4.2.1/hw/pci/ |
H A D | shpc.c | 400 uint8_t w1cmask = shpc->w1cmask[a]; in shpc_write() local 401 assert(!(wmask & w1cmask)); in shpc_write() 403 shpc->config[a] &= ~(val & w1cmask); /* W1C: Write 1 to Clear */ in shpc_write() 610 shpc->w1cmask = g_malloc0(SHPC_SIZEOF(d)); in shpc_init() 624 pci_set_long(shpc->w1cmask + SHPC_SERR_INT, in shpc_init() 637 pci_set_byte(shpc->w1cmask + in shpc_init() 681 g_free(shpc->w1cmask); in shpc_free()
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/dports/emulators/qemu/qemu-6.2.0/hw/pci/ |
H A D | shpc.c | 399 uint8_t w1cmask = shpc->w1cmask[a]; in shpc_write() local 400 assert(!(wmask & w1cmask)); in shpc_write() 402 shpc->config[a] &= ~(val & w1cmask); /* W1C: Write 1 to Clear */ in shpc_write() 610 shpc->w1cmask = g_malloc0(SHPC_SIZEOF(d)); in shpc_init() 624 pci_set_long(shpc->w1cmask + SHPC_SERR_INT, in shpc_init() 637 pci_set_byte(shpc->w1cmask + in shpc_init() 681 g_free(shpc->w1cmask); in shpc_free()
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/dports/emulators/qemu60/qemu-6.0.0/hw/pci/ |
H A D | shpc.c | 399 uint8_t w1cmask = shpc->w1cmask[a]; in shpc_write() local 400 assert(!(wmask & w1cmask)); in shpc_write() 402 shpc->config[a] &= ~(val & w1cmask); /* W1C: Write 1 to Clear */ in shpc_write() 610 shpc->w1cmask = g_malloc0(SHPC_SIZEOF(d)); in shpc_init() 624 pci_set_long(shpc->w1cmask + SHPC_SERR_INT, in shpc_init() 637 pci_set_byte(shpc->w1cmask + in shpc_init() 681 g_free(shpc->w1cmask); in shpc_free()
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/dports/emulators/qemu-utils/qemu-4.2.1/hw/pci/ |
H A D | shpc.c | 400 uint8_t w1cmask = shpc->w1cmask[a]; in shpc_write() local 401 assert(!(wmask & w1cmask)); in shpc_write() 403 shpc->config[a] &= ~(val & w1cmask); /* W1C: Write 1 to Clear */ in shpc_write() 610 shpc->w1cmask = g_malloc0(SHPC_SIZEOF(d)); in shpc_init() 624 pci_set_long(shpc->w1cmask + SHPC_SERR_INT, in shpc_init() 637 pci_set_byte(shpc->w1cmask + in shpc_init() 681 g_free(shpc->w1cmask); in shpc_free()
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/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/hw/pci/ |
H A D | shpc.c | 396 uint8_t w1cmask = shpc->w1cmask[a]; in shpc_write() local 397 assert(!(wmask & w1cmask)); in shpc_write() 399 shpc->config[a] &= ~(val & w1cmask); /* W1C: Write 1 to Clear */ in shpc_write() 600 shpc->w1cmask = g_malloc0(SHPC_SIZEOF(d)); in shpc_init() 614 pci_set_long(shpc->w1cmask + SHPC_SERR_INT, in shpc_init() 627 pci_set_byte(shpc->w1cmask + in shpc_init() 671 g_free(shpc->w1cmask); in shpc_free()
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/dports/emulators/qemu5/qemu-5.2.0/hw/pci/ |
H A D | shpc.c | 400 uint8_t w1cmask = shpc->w1cmask[a]; in shpc_write() local 401 assert(!(wmask & w1cmask)); in shpc_write() 403 shpc->config[a] &= ~(val & w1cmask); /* W1C: Write 1 to Clear */ in shpc_write() 610 shpc->w1cmask = g_malloc0(SHPC_SIZEOF(d)); in shpc_init() 624 pci_set_long(shpc->w1cmask + SHPC_SERR_INT, in shpc_init() 637 pci_set_byte(shpc->w1cmask + in shpc_init() 681 g_free(shpc->w1cmask); in shpc_free()
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/hw/pci/ |
H A D | shpc.c | 400 uint8_t w1cmask = shpc->w1cmask[a]; 401 assert(!(wmask & w1cmask)); 403 shpc->config[a] &= ~(val & w1cmask); /* W1C: Write 1 to Clear */ 610 shpc->w1cmask = g_malloc0(SHPC_SIZEOF(d)); 624 pci_set_long(shpc->w1cmask + SHPC_SERR_INT, 637 pci_set_byte(shpc->w1cmask + 681 g_free(shpc->w1cmask);
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/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/hw/pci/ |
H A D | shpc.c | 399 uint8_t w1cmask = shpc->w1cmask[a]; in shpc_write() local 400 assert(!(wmask & w1cmask)); in shpc_write() 402 shpc->config[a] &= ~(val & w1cmask); /* W1C: Write 1 to Clear */ in shpc_write() 610 shpc->w1cmask = g_malloc0(SHPC_SIZEOF(d)); in shpc_init() 624 pci_set_long(shpc->w1cmask + SHPC_SERR_INT, in shpc_init() 637 pci_set_byte(shpc->w1cmask + in shpc_init() 681 g_free(shpc->w1cmask); in shpc_free()
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/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/hw/pci/ |
H A D | shpc.c | 400 uint8_t w1cmask = shpc->w1cmask[a]; in shpc_write() local 401 assert(!(wmask & w1cmask)); in shpc_write() 403 shpc->config[a] &= ~(val & w1cmask); /* W1C: Write 1 to Clear */ in shpc_write() 610 shpc->w1cmask = g_malloc0(SHPC_SIZEOF(d)); in shpc_init() 624 pci_set_long(shpc->w1cmask + SHPC_SERR_INT, in shpc_init() 637 pci_set_byte(shpc->w1cmask + in shpc_init() 681 g_free(shpc->w1cmask); in shpc_free()
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/dports/emulators/qemu42/qemu-4.2.1/hw/i386/ |
H A D | amd_iommu.c | 79 uint64_t romask, uint64_t w1cmask) in amdvi_set_quad() argument 83 stq_le_p(&s->w1cmask[addr], w1cmask); in amdvi_set_quad() 111 uint16_t w1cmask = lduw_le_p(&s->w1cmask[addr]); in amdvi_writew() local 114 ((oldval & romask) | (val & ~romask)) & ~(val & w1cmask)); in amdvi_writew() 120 uint32_t w1cmask = ldl_le_p(&s->w1cmask[addr]); in amdvi_writel() local 123 ((oldval & romask) | (val & ~romask)) & ~(val & w1cmask)); in amdvi_writel() 129 uint64_t w1cmask = ldq_le_p(&s->w1cmask[addr]); in amdvi_writeq() local 132 ((oldval & romask) | (val & ~romask)) & ~(val & w1cmask)); in amdvi_writeq()
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/dports/emulators/qemu/qemu-6.2.0/hw/i386/ |
H A D | amd_iommu.c | 79 uint64_t romask, uint64_t w1cmask) in amdvi_set_quad() argument 83 stq_le_p(&s->w1cmask[addr], w1cmask); in amdvi_set_quad() 111 uint16_t w1cmask = lduw_le_p(&s->w1cmask[addr]); in amdvi_writew() local 114 ((oldval & romask) | (val & ~romask)) & ~(val & w1cmask)); in amdvi_writew() 120 uint32_t w1cmask = ldl_le_p(&s->w1cmask[addr]); in amdvi_writel() local 123 ((oldval & romask) | (val & ~romask)) & ~(val & w1cmask)); in amdvi_writel() 129 uint64_t w1cmask = ldq_le_p(&s->w1cmask[addr]); in amdvi_writeq() local 132 ((oldval & romask) | (val & ~romask)) & ~(val & w1cmask)); in amdvi_writeq()
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/dports/emulators/qemu60/qemu-6.0.0/hw/i386/ |
H A D | amd_iommu.c | 79 uint64_t romask, uint64_t w1cmask) in amdvi_set_quad() argument 83 stq_le_p(&s->w1cmask[addr], w1cmask); in amdvi_set_quad() 111 uint16_t w1cmask = lduw_le_p(&s->w1cmask[addr]); in amdvi_writew() local 114 ((oldval & romask) | (val & ~romask)) & ~(val & w1cmask)); in amdvi_writew() 120 uint32_t w1cmask = ldl_le_p(&s->w1cmask[addr]); in amdvi_writel() local 123 ((oldval & romask) | (val & ~romask)) & ~(val & w1cmask)); in amdvi_writel() 129 uint64_t w1cmask = ldq_le_p(&s->w1cmask[addr]); in amdvi_writeq() local 132 ((oldval & romask) | (val & ~romask)) & ~(val & w1cmask)); in amdvi_writeq()
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/dports/emulators/qemu-utils/qemu-4.2.1/hw/i386/ |
H A D | amd_iommu.c | 79 uint64_t romask, uint64_t w1cmask) in amdvi_set_quad() argument 83 stq_le_p(&s->w1cmask[addr], w1cmask); in amdvi_set_quad() 111 uint16_t w1cmask = lduw_le_p(&s->w1cmask[addr]); in amdvi_writew() local 114 ((oldval & romask) | (val & ~romask)) & ~(val & w1cmask)); in amdvi_writew() 120 uint32_t w1cmask = ldl_le_p(&s->w1cmask[addr]); in amdvi_writel() local 123 ((oldval & romask) | (val & ~romask)) & ~(val & w1cmask)); in amdvi_writel() 129 uint64_t w1cmask = ldq_le_p(&s->w1cmask[addr]); in amdvi_writeq() local 132 ((oldval & romask) | (val & ~romask)) & ~(val & w1cmask)); in amdvi_writeq()
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/dports/emulators/qemu5/qemu-5.2.0/hw/i386/ |
H A D | amd_iommu.c | 79 uint64_t romask, uint64_t w1cmask) in amdvi_set_quad() argument 83 stq_le_p(&s->w1cmask[addr], w1cmask); in amdvi_set_quad() 111 uint16_t w1cmask = lduw_le_p(&s->w1cmask[addr]); in amdvi_writew() local 114 ((oldval & romask) | (val & ~romask)) & ~(val & w1cmask)); in amdvi_writew() 120 uint32_t w1cmask = ldl_le_p(&s->w1cmask[addr]); in amdvi_writel() local 123 ((oldval & romask) | (val & ~romask)) & ~(val & w1cmask)); in amdvi_writel() 129 uint64_t w1cmask = ldq_le_p(&s->w1cmask[addr]); in amdvi_writeq() local 132 ((oldval & romask) | (val & ~romask)) & ~(val & w1cmask)); in amdvi_writeq()
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/hw/i386/ |
H A D | amd_iommu.c | 79 uint64_t romask, uint64_t w1cmask) in amdvi_set_quad() argument 83 stq_le_p(&s->w1cmask[addr], w1cmask); in amdvi_set_quad() 111 uint16_t w1cmask = lduw_le_p(&s->w1cmask[addr]); in amdvi_writew() local 114 ((oldval & romask) | (val & ~romask)) & ~(val & w1cmask)); in amdvi_writew() 120 uint32_t w1cmask = ldl_le_p(&s->w1cmask[addr]); in amdvi_writel() local 123 ((oldval & romask) | (val & ~romask)) & ~(val & w1cmask)); in amdvi_writel() 129 uint64_t w1cmask = ldq_le_p(&s->w1cmask[addr]); in amdvi_writeq() local 132 ((oldval & romask) | (val & ~romask)) & ~(val & w1cmask)); in amdvi_writeq()
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/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/hw/i386/ |
H A D | amd_iommu.c | 79 uint64_t romask, uint64_t w1cmask) in amdvi_set_quad() argument 83 stq_le_p(&s->w1cmask[addr], w1cmask); in amdvi_set_quad() 111 uint16_t w1cmask = lduw_le_p(&s->w1cmask[addr]); in amdvi_writew() local 114 ((oldval & romask) | (val & ~romask)) & ~(val & w1cmask)); in amdvi_writew() 120 uint32_t w1cmask = ldl_le_p(&s->w1cmask[addr]); in amdvi_writel() local 123 ((oldval & romask) | (val & ~romask)) & ~(val & w1cmask)); in amdvi_writel() 129 uint64_t w1cmask = ldq_le_p(&s->w1cmask[addr]); in amdvi_writeq() local 132 ((oldval & romask) | (val & ~romask)) & ~(val & w1cmask)); in amdvi_writeq()
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/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/hw/i386/ |
H A D | amd_iommu.c | 79 uint64_t romask, uint64_t w1cmask) in amdvi_set_quad() argument 83 stq_le_p(&s->w1cmask[addr], w1cmask); in amdvi_set_quad() 111 uint16_t w1cmask = lduw_le_p(&s->w1cmask[addr]); in amdvi_writew() local 114 ((oldval & romask) | (val & ~romask)) & ~(val & w1cmask)); in amdvi_writew() 120 uint32_t w1cmask = ldl_le_p(&s->w1cmask[addr]); in amdvi_writel() local 123 ((oldval & romask) | (val & ~romask)) & ~(val & w1cmask)); in amdvi_writel() 129 uint64_t w1cmask = ldq_le_p(&s->w1cmask[addr]); in amdvi_writeq() local 132 ((oldval & romask) | (val & ~romask)) & ~(val & w1cmask)); in amdvi_writeq()
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/dports/emulators/qemu42/qemu-4.2.1/hw/ide/ |
H A D | cmd646.c | 266 dev->w1cmask[CFR] = CFR_INTR_CH0; in pci_cmd646_ide_realize() 268 dev->w1cmask[ARTTIM23] = ARTTIM23_INTR_CH1; in pci_cmd646_ide_realize() 270 dev->w1cmask[MRDMODE] = MRDMODE_INTR_CH0 | MRDMODE_INTR_CH1; in pci_cmd646_ide_realize()
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/dports/emulators/qemu/qemu-6.2.0/hw/ide/ |
H A D | cmd646.c | 266 dev->w1cmask[CFR] = CFR_INTR_CH0; in pci_cmd646_ide_realize() 268 dev->w1cmask[ARTTIM23] = ARTTIM23_INTR_CH1; in pci_cmd646_ide_realize() 270 dev->w1cmask[MRDMODE] = MRDMODE_INTR_CH0 | MRDMODE_INTR_CH1; in pci_cmd646_ide_realize()
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/dports/emulators/qemu60/qemu-6.0.0/hw/ide/ |
H A D | cmd646.c | 266 dev->w1cmask[CFR] = CFR_INTR_CH0; in pci_cmd646_ide_realize() 268 dev->w1cmask[ARTTIM23] = ARTTIM23_INTR_CH1; in pci_cmd646_ide_realize() 270 dev->w1cmask[MRDMODE] = MRDMODE_INTR_CH0 | MRDMODE_INTR_CH1; in pci_cmd646_ide_realize()
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/dports/emulators/qemu5/qemu-5.2.0/hw/ide/ |
H A D | cmd646.c | 266 dev->w1cmask[CFR] = CFR_INTR_CH0; in pci_cmd646_ide_realize() 268 dev->w1cmask[ARTTIM23] = ARTTIM23_INTR_CH1; in pci_cmd646_ide_realize() 270 dev->w1cmask[MRDMODE] = MRDMODE_INTR_CH0 | MRDMODE_INTR_CH1; in pci_cmd646_ide_realize()
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/dports/emulators/qemu-utils/qemu-4.2.1/hw/ide/ |
H A D | cmd646.c | 266 dev->w1cmask[CFR] = CFR_INTR_CH0; in pci_cmd646_ide_realize() 268 dev->w1cmask[ARTTIM23] = ARTTIM23_INTR_CH1; in pci_cmd646_ide_realize() 270 dev->w1cmask[MRDMODE] = MRDMODE_INTR_CH0 | MRDMODE_INTR_CH1; in pci_cmd646_ide_realize()
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/hw/ide/ |
H A D | cmd646.c | 266 dev->w1cmask[CFR] = CFR_INTR_CH0; in pci_cmd646_ide_realize() 268 dev->w1cmask[ARTTIM23] = ARTTIM23_INTR_CH1; in pci_cmd646_ide_realize() 270 dev->w1cmask[MRDMODE] = MRDMODE_INTR_CH0 | MRDMODE_INTR_CH1; in pci_cmd646_ide_realize()
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/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/hw/ide/ |
H A D | cmd646.c | 266 dev->w1cmask[CFR] = CFR_INTR_CH0; in pci_cmd646_ide_realize() 268 dev->w1cmask[ARTTIM23] = ARTTIM23_INTR_CH1; in pci_cmd646_ide_realize() 270 dev->w1cmask[MRDMODE] = MRDMODE_INTR_CH0 | MRDMODE_INTR_CH1; in pci_cmd646_ide_realize()
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