Searched refs:write_mtvec (Results 1 – 8 of 8) sorted by relevance
| /dports/emulators/qemu-utils/qemu-4.2.1/target/riscv/ |
| H A D | csr.c | 452 static int write_mtvec(CPURISCVState *env, int csrno, target_ulong val) in write_mtvec() function
919 [CSR_MTVEC] = { any, read_mtvec, write_mtvec },
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| /dports/emulators/qemu42/qemu-4.2.1/target/riscv/ |
| H A D | csr.c | 452 static int write_mtvec(CPURISCVState *env, int csrno, target_ulong val) in write_mtvec() function
919 [CSR_MTVEC] = { any, read_mtvec, write_mtvec },
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| /dports/emulators/qemu5/qemu-5.2.0/target/riscv/ |
| H A D | csr.c | 605 static int write_mtvec(CPURISCVState *env, int csrno, target_ulong val) in write_mtvec() function
1410 [CSR_MTVEC] = { any, read_mtvec, write_mtvec },
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| /dports/emulators/qemu-guest-agent/qemu-5.0.1/target/riscv/ |
| H A D | csr.c | 524 static int write_mtvec(CPURISCVState *env, int csrno, target_ulong val) in write_mtvec() function
1309 [CSR_MTVEC] = { any, read_mtvec, write_mtvec },
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| /dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/riscv/ |
| H A D | csr.c | 535 static int write_mtvec(CPURISCVState *env, int csrno, target_ulong val) in write_mtvec() function
1412 [CSR_MTVEC] = { any, read_mtvec, write_mtvec },
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| /dports/emulators/qemu60/qemu-6.0.0/target/riscv/ |
| H A D | csr.c | 624 static int write_mtvec(CPURISCVState *env, int csrno, target_ulong val) in write_mtvec() function
1417 [CSR_MTVEC] = { "mtvec", any, read_mtvec, write_mtvec },
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| /dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/riscv/ |
| H A D | csr.c | 673 static RISCVException write_mtvec(CPURISCVState *env, int csrno, in write_mtvec() function
1559 [CSR_MTVEC] = { "mtvec", any, read_mtvec, write_mtvec },
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| /dports/emulators/qemu/qemu-6.2.0/target/riscv/ |
| H A D | csr.c | 712 static RISCVException write_mtvec(CPURISCVState *env, int csrno, in write_mtvec() function
1855 [CSR_MTVEC] = { "mtvec", any, read_mtvec, write_mtvec },
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