Home
last modified time | relevance | path

Searched refs:wrptr_g (Results 1 – 2 of 2) sorted by relevance

/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp1/megacells/
H A Dfifo_2k.v3048 reg [10:0] wrptr_g; register
3081 .gray(wrptr_g));
3106 .address_a(wrptr_g),
3120 else delayed_wrptr_g <= wrptr_g;
3123 wrptr_g = 0;
3126 if (aclr == 1'b1) wrptr_g <= 11'b0;
3127 else if (valid_wrreq == 1'b1) wrptr_g <= wire_wrptr_g1p_q;
H A Dfifo_4k.v3200 reg [11:0] wrptr_g; register
3233 .gray(wrptr_g));
3258 .address_a(wrptr_g),
3272 else delayed_wrptr_g <= wrptr_g;
3275 wrptr_g = 0;
3278 if (aclr == 1'b1) wrptr_g <= 12'b0;
3279 else if (valid_wrreq == 1'b1) wrptr_g <= wire_wrptr_g1p_q;