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/dports/science/libccp4/libccp4-6.5.1/ccp4/
H A Dcmtzlib.c1165 mtz->xtal[i]->cell[0],mtz->xtal[i]->cell[1],mtz->xtal[i]->cell[2], in MtzDebugHierarchy()
1166 mtz->xtal[i]->cell[3],mtz->xtal[i]->cell[4],mtz->xtal[i]->cell[5]); in MtzDebugHierarchy()
1689 mtz->xtal[i]->cell[0],mtz->xtal[i]->cell[1],mtz->xtal[i]->cell[2], in ccp4_lhprt()
1690 mtz->xtal[i]->cell[3],mtz->xtal[i]->cell[4],mtz->xtal[i]->cell[5]); in ccp4_lhprt()
1799 mtz->xtal[i]->cell[0],mtz->xtal[i]->cell[1],mtz->xtal[i]->cell[2], in ccp4_lhprt()
1800 mtz->xtal[i]->cell[3],mtz->xtal[i]->cell[4],mtz->xtal[i]->cell[5]); in ccp4_lhprt()
1895 mtz->xtal[i]->cell[0],mtz->xtal[i]->cell[1],mtz->xtal[i]->cell[2], in ccp4_lhprt_adv()
1896 mtz->xtal[i]->cell[3],mtz->xtal[i]->cell[4],mtz->xtal[i]->cell[5]); in ccp4_lhprt_adv()
2679 mtz->xtal[i]->cell[1],mtz->xtal[i]->cell[2],mtz->xtal[i]->cell[3], in MtzPut()
2853 mtz->xtal[i]->cell[1],mtz->xtal[i]->cell[2], in MtzPut()
[all …]
/dports/emulators/mess/mame-mame0226/src/emu/
H A Dxtal.h58 friend constexpr XTAL operator *(int mult, const XTAL &xtal);
59 friend constexpr XTAL operator *(unsigned int mult, const XTAL &xtal);
60 friend constexpr XTAL operator *(double mult, const XTAL &xtal);
77 template <typename T> constexpr auto operator /(T &&div, const XTAL &xtal) { return div / xtal.dval…
79 …stexpr XTAL operator *(int mult, const XTAL &xtal) { return XTAL(xtal.base(), mult * xtal…
80 …stexpr XTAL operator *(unsigned int mult, const XTAL &xtal) { return XTAL(xtal.base(), mult * xtal…
81 …stexpr XTAL operator *(double mult, const XTAL &xtal) { return XTAL(xtal.base(), mult * xtal…
/dports/emulators/mame/mame-mame0226/src/emu/
H A Dxtal.h58 friend constexpr XTAL operator *(int mult, const XTAL &xtal);
59 friend constexpr XTAL operator *(unsigned int mult, const XTAL &xtal);
60 friend constexpr XTAL operator *(double mult, const XTAL &xtal);
77 template <typename T> constexpr auto operator /(T &&div, const XTAL &xtal) { return div / xtal.dval…
79 …stexpr XTAL operator *(int mult, const XTAL &xtal) { return XTAL(xtal.base(), mult * xtal…
80 …stexpr XTAL operator *(unsigned int mult, const XTAL &xtal) { return XTAL(xtal.base(), mult * xtal…
81 …stexpr XTAL operator *(double mult, const XTAL &xtal) { return XTAL(xtal.base(), mult * xtal…
/dports/multimedia/libv4l/linux-5.13-rc2/arch/arm/boot/dts/
H A Dmeson6.dtsi51 clocks = <&xtal>, <&clk81>;
52 clock-names = "xtal", "pclk";
56 clocks = <&xtal>, <&clk81>, <&clk81>;
57 clock-names = "xtal", "pclk", "baud";
61 clocks = <&xtal>, <&clk81>, <&clk81>;
62 clock-names = "xtal", "pclk", "baud";
66 clocks = <&xtal>, <&clk81>, <&clk81>;
67 clock-names = "xtal", "pclk", "baud";
71 clocks = <&xtal>, <&clk81>, <&clk81>;
72 clock-names = "xtal", "pclk", "baud";
/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/arm/boot/dts/
H A Dmeson6.dtsi51 clocks = <&xtal>, <&clk81>;
52 clock-names = "xtal", "pclk";
56 clocks = <&xtal>, <&clk81>, <&clk81>;
57 clock-names = "xtal", "pclk", "baud";
61 clocks = <&xtal>, <&clk81>, <&clk81>;
62 clock-names = "xtal", "pclk", "baud";
66 clocks = <&xtal>, <&clk81>, <&clk81>;
67 clock-names = "xtal", "pclk", "baud";
71 clocks = <&xtal>, <&clk81>, <&clk81>;
72 clock-names = "xtal", "pclk", "baud";
/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/arm/boot/dts/
H A Dmeson6.dtsi51 clocks = <&xtal>, <&clk81>;
52 clock-names = "xtal", "pclk";
56 clocks = <&xtal>, <&clk81>, <&clk81>;
57 clock-names = "xtal", "pclk", "baud";
61 clocks = <&xtal>, <&clk81>, <&clk81>;
62 clock-names = "xtal", "pclk", "baud";
66 clocks = <&xtal>, <&clk81>, <&clk81>;
67 clock-names = "xtal", "pclk", "baud";
71 clocks = <&xtal>, <&clk81>, <&clk81>;
72 clock-names = "xtal", "pclk", "baud";
/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/arm64/boot/dts/amlogic/
H A Dmeson-a1.dtsi113 clocks = <&xtal>, <&xtal>, <&xtal>;
114 clock-names = "xtal", "pclk", "baud";
123 clocks = <&xtal>, <&xtal>, <&xtal>;
124 clock-names = "xtal", "pclk", "baud";
155 xtal: xtal-clk { label
158 clock-output-names = "xtal";
H A Dmeson-gxbb.dtsi286 clocks = <&xtal>, <&clkc CLKID_CLK81>;
287 clock-names = "xtal", "mpeg-clk";
324 clocks = <&xtal>;
325 clock-names = "xtal";
769 clocks = <&xtal>,
818 clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
819 clock-names = "xtal", "pclk", "baud";
823 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>;
828 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>;
833 clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
[all …]
/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/arm64/boot/dts/amlogic/
H A Dmeson-a1.dtsi113 clocks = <&xtal>, <&xtal>, <&xtal>;
114 clock-names = "xtal", "pclk", "baud";
123 clocks = <&xtal>, <&xtal>, <&xtal>;
124 clock-names = "xtal", "pclk", "baud";
155 xtal: xtal-clk { label
158 clock-output-names = "xtal";
/dports/multimedia/libv4l/linux-5.13-rc2/arch/arm64/boot/dts/amlogic/
H A Dmeson-a1.dtsi113 clocks = <&xtal>, <&xtal>, <&xtal>;
114 clock-names = "xtal", "pclk", "baud";
123 clocks = <&xtal>, <&xtal>, <&xtal>;
124 clock-names = "xtal", "pclk", "baud";
155 xtal: xtal-clk { label
158 clock-output-names = "xtal";
/dports/cad/py-lcapy/lcapy-23c940f/demo/oneport/
H A Dxtal2.py11 xtal = Xtal(C_0, R_1, L_1, C_1) variable
13 pprint(xtal)
14 pprint(xtal.expand())
15 pprint(xtal.Z)
21 Zf = xtal.Z.frequency_response(f)
/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/arm/mach-s3c/
H A Ds3c24xx.h22 extern void s3c2410_init_clocks(int xtal);
36 extern void s3c2412_init_clocks(int xtal);
50 extern void s3c2416_init_clocks(int xtal);
72 extern void s3c2440_init_clocks(int xtal);
82 extern void s3c2442_init_clocks(int xtal);
93 extern void s3c2443_init_clocks(int xtal);
/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/arm/mach-s3c/
H A Ds3c24xx.h22 extern void s3c2410_init_clocks(int xtal);
36 extern void s3c2412_init_clocks(int xtal);
50 extern void s3c2416_init_clocks(int xtal);
72 extern void s3c2440_init_clocks(int xtal);
82 extern void s3c2442_init_clocks(int xtal);
93 extern void s3c2443_init_clocks(int xtal);
/dports/multimedia/libv4l/linux-5.13-rc2/arch/arm/mach-s3c/
H A Ds3c24xx.h22 extern void s3c2410_init_clocks(int xtal);
36 extern void s3c2412_init_clocks(int xtal);
50 extern void s3c2416_init_clocks(int xtal);
72 extern void s3c2440_init_clocks(int xtal);
82 extern void s3c2442_init_clocks(int xtal);
93 extern void s3c2443_init_clocks(int xtal);
/dports/multimedia/v4l_compat/linux-5.13-rc2/sound/soc/samsung/
H A Ds3c24xx_uda134x.c21 struct clk *xtal; member
60 priv->xtal = clk_get(rtd->dev, "xtal"); in s3c24xx_uda134x_startup()
61 if (IS_ERR(priv->xtal)) { in s3c24xx_uda134x_startup()
63 ret = PTR_ERR(priv->xtal); in s3c24xx_uda134x_startup()
69 clk_put(priv->xtal); in s3c24xx_uda134x_startup()
79 rates[i*33] = clk_get_rate(priv->xtal) / fs; in s3c24xx_uda134x_startup()
110 clk_put(priv->xtal); in s3c24xx_uda134x_shutdown()
111 priv->xtal = NULL; in s3c24xx_uda134x_shutdown()
/dports/multimedia/libv4l/linux-5.13-rc2/sound/soc/samsung/
H A Ds3c24xx_uda134x.c21 struct clk *xtal; member
60 priv->xtal = clk_get(rtd->dev, "xtal"); in s3c24xx_uda134x_startup()
61 if (IS_ERR(priv->xtal)) { in s3c24xx_uda134x_startup()
63 ret = PTR_ERR(priv->xtal); in s3c24xx_uda134x_startup()
69 clk_put(priv->xtal); in s3c24xx_uda134x_startup()
79 rates[i*33] = clk_get_rate(priv->xtal) / fs; in s3c24xx_uda134x_startup()
110 clk_put(priv->xtal); in s3c24xx_uda134x_shutdown()
111 priv->xtal = NULL; in s3c24xx_uda134x_shutdown()
/dports/multimedia/v4l-utils/linux-5.13-rc2/sound/soc/samsung/
H A Ds3c24xx_uda134x.c21 struct clk *xtal; member
60 priv->xtal = clk_get(rtd->dev, "xtal"); in s3c24xx_uda134x_startup()
61 if (IS_ERR(priv->xtal)) { in s3c24xx_uda134x_startup()
63 ret = PTR_ERR(priv->xtal); in s3c24xx_uda134x_startup()
69 clk_put(priv->xtal); in s3c24xx_uda134x_startup()
79 rates[i*33] = clk_get_rate(priv->xtal) / fs; in s3c24xx_uda134x_startup()
110 clk_put(priv->xtal); in s3c24xx_uda134x_shutdown()
111 priv->xtal = NULL; in s3c24xx_uda134x_shutdown()
/dports/sysutils/rovclock/rovclock-0.6e/
H A Drovclock.c116 u32 xtal; member
261 rovclock->cfreq = round_div(rovclock->pllreg.Ns * rovclock->xtal, rovclock->pllreg.M); in pll_info()
262 rovclock->mfreq = round_div(rovclock->pllreg.Nm * rovclock->xtal, rovclock->pllreg.M); in pll_info()
265 …printf("XTAL: %d.%d MHz, RefDiv: %d\n\n", rovclock->xtal / 100, rovclock->xtal % 100, rovclock->re… in pll_info()
278 rovclock->pllreg.Ns = round_div(rovclock->cfreq * 100 * rovclock->pllreg.M, rovclock->xtal); in pll_set_freq()
279 rovclock->pllreg.Nm = round_div(rovclock->mfreq * 100 * rovclock->pllreg.M, rovclock->xtal); in pll_set_freq()
423 rovclock.xtal = XTAL; in main()
454 rovclock.xtal = rovclock.pll.PCLK_ref_freq; in main()
455 printf("Reference clock from BIOS: %d.%d MHz\n", rovclock.xtal / 100, rovclock.xtal % 100); in main()
472 case 'x': rovclock.xtal = atoi(optarg); in main()
[all …]
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/dts/
H A Dmeson-gxbb.dtsi286 clocks = <&xtal>, <&clkc CLKID_CLK81>;
287 clock-names = "xtal", "mpeg-clk";
324 clocks = <&xtal>;
325 clock-names = "xtal";
769 clocks = <&xtal>,
818 clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
819 clock-names = "xtal", "pclk", "baud";
823 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>;
828 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>;
833 clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
[all …]
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/arm/dts/
H A Dmeson-gxbb.dtsi286 clocks = <&xtal>, <&clkc CLKID_CLK81>;
287 clock-names = "xtal", "mpeg-clk";
324 clocks = <&xtal>;
325 clock-names = "xtal";
769 clocks = <&xtal>,
818 clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
819 clock-names = "xtal", "pclk", "baud";
823 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>;
828 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>;
833 clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
[all …]
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/dts/
H A Dmeson-gxbb.dtsi286 clocks = <&xtal>, <&clkc CLKID_CLK81>;
287 clock-names = "xtal", "mpeg-clk";
324 clocks = <&xtal>;
325 clock-names = "xtal";
769 clocks = <&xtal>,
818 clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
819 clock-names = "xtal", "pclk", "baud";
823 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>;
828 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>;
833 clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
[all …]
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/dts/
H A Dmeson-gxbb.dtsi286 clocks = <&xtal>, <&clkc CLKID_CLK81>;
287 clock-names = "xtal", "mpeg-clk";
324 clocks = <&xtal>;
325 clock-names = "xtal";
769 clocks = <&xtal>,
818 clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
819 clock-names = "xtal", "pclk", "baud";
823 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>;
828 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>;
833 clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
[all …]
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/arch/arm/dts/
H A Dmeson-gxbb.dtsi286 clocks = <&xtal>, <&clkc CLKID_CLK81>;
287 clock-names = "xtal", "mpeg-clk";
324 clocks = <&xtal>;
325 clock-names = "xtal";
769 clocks = <&xtal>,
818 clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
819 clock-names = "xtal", "pclk", "baud";
823 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>;
828 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>;
833 clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
[all …]
/dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/arm/dts/
H A Dmeson-gxbb.dtsi286 clocks = <&xtal>, <&clkc CLKID_CLK81>;
287 clock-names = "xtal", "mpeg-clk";
324 clocks = <&xtal>;
325 clock-names = "xtal";
769 clocks = <&xtal>,
818 clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
819 clock-names = "xtal", "pclk", "baud";
823 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>;
828 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>;
833 clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
[all …]
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/dts/
H A Dmeson-gxbb.dtsi286 clocks = <&xtal>, <&clkc CLKID_CLK81>;
287 clock-names = "xtal", "mpeg-clk";
324 clocks = <&xtal>;
325 clock-names = "xtal";
769 clocks = <&xtal>,
818 clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
819 clock-names = "xtal", "pclk", "baud";
823 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>;
828 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>;
833 clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
[all …]

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