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Searched refs:CG_DISPLAY_GAP_CNTL (Results 1 – 12 of 12) sorted by relevance

/dragonfly/sys/dev/drm/radeon/
H A Drv6xxd.h130 #define CG_DISPLAY_GAP_CNTL 0x7dc macro
H A Dcypress_dpm.c1730 u32 tmp = RREG32(CG_DISPLAY_GAP_CNTL); in cypress_enable_display_gap()
1739 WREG32(CG_DISPLAY_GAP_CNTL, tmp); in cypress_enable_display_gap()
1747 tmp = RREG32(CG_DISPLAY_GAP_CNTL) & ~(DISP1_GAP_MASK | DISP2_GAP_MASK); in cypress_program_display_gap()
1758 WREG32(CG_DISPLAY_GAP_CNTL, tmp); in cypress_program_display_gap()
H A Drv770_dpm.c884 u32 tmp = RREG32(CG_DISPLAY_GAP_CNTL); in rv770_enable_display_gap()
889 WREG32(CG_DISPLAY_GAP_CNTL, tmp); in rv770_enable_display_gap()
1348 u32 tmp = RREG32(CG_DISPLAY_GAP_CNTL); in rv770_program_display_gap()
1361 WREG32(CG_DISPLAY_GAP_CNTL, tmp); in rv770_program_display_gap()
H A Drv6xx_dpm.c990 WREG32(CG_DISPLAY_GAP_CNTL, tmp); in rv6xx_enable_display_gap()
1183 u32 tmp = RREG32(CG_DISPLAY_GAP_CNTL); in rv6xx_program_display_gap()
1196 WREG32(CG_DISPLAY_GAP_CNTL, tmp); in rv6xx_program_display_gap()
H A Drv770d.h255 #define CG_DISPLAY_GAP_CNTL 0x714 macro
H A Dsid.h301 #define CG_DISPLAY_GAP_CNTL 0x828 macro
H A Dcikd.h129 #define CG_DISPLAY_GAP_CNTL 0xC0200060 macro
H A Dci_dpm.c2021 u32 tmp = RREG32_SMC(CG_DISPLAY_GAP_CNTL); in ci_program_display_gap()
2033 WREG32_SMC(CG_DISPLAY_GAP_CNTL, tmp); in ci_program_display_gap()
2082 u32 tmp = RREG32_SMC(CG_DISPLAY_GAP_CNTL); in ci_enable_display_gap()
2088 WREG32_SMC(CG_DISPLAY_GAP_CNTL, tmp); in ci_enable_display_gap()
H A Dsi_dpm.c3685 tmp = RREG32(CG_DISPLAY_GAP_CNTL) & ~(DISP1_GAP_MASK | DISP2_GAP_MASK); in si_program_display_gap()
3696 WREG32(CG_DISPLAY_GAP_CNTL, tmp); in si_program_display_gap()
3799 u32 tmp = RREG32(CG_DISPLAY_GAP_CNTL); in si_enable_display_gap()
3808 WREG32(CG_DISPLAY_GAP_CNTL, tmp); in si_enable_display_gap()
H A Devergreend.h193 #define CG_DISPLAY_GAP_CNTL 0x714 macro
/dragonfly/sys/dev/drm/amd/powerplay/hwmgr/
H A Dsmu7_hwmgr.c389 display_gap = PHM_SET_FIELD(display_gap, CG_DISPLAY_GAP_CNTL, in smu7_enable_display_gap()
392 display_gap = PHM_SET_FIELD(display_gap, CG_DISPLAY_GAP_CNTL, in smu7_enable_display_gap()
4070 …display_gap = PHM_SET_FIELD(display_gap, CG_DISPLAY_GAP_CNTL, DISP_GAP, (hwmgr->display_config->nu… in smu7_program_display_gap()
/dragonfly/sys/dev/drm/amd/amdgpu/
H A Dsi_dpm.c4151 tmp = RREG32(CG_DISPLAY_GAP_CNTL) & ~(DISP1_GAP_MASK | DISP2_GAP_MASK); in si_program_display_gap()
4162 WREG32(CG_DISPLAY_GAP_CNTL, tmp); in si_program_display_gap()
4265 u32 tmp = RREG32(CG_DISPLAY_GAP_CNTL); in si_enable_display_gap()
4274 WREG32(CG_DISPLAY_GAP_CNTL, tmp); in si_enable_display_gap()