Searched refs:CHV_TX_DW3 (Results 1 – 2 of 2) sorted by relevance
| /dragonfly/sys/dev/drm/i915/ |
| H A D | intel_dpio_phy.c | 713 val = vlv_dpio_read(dev_priv, pipe, CHV_TX_DW3(ch, i)); in chv_set_phy_signal_level()
718 vlv_dpio_write(dev_priv, pipe, CHV_TX_DW3(ch, i), val); in chv_set_phy_signal_level()
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| H A D | i915_reg.h | 1743 #define CHV_TX_DW3(ch, lane) _TXLANE(ch, lane, 0x8c) macro
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