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Searched refs:DCIO_EXT_VSYNC_MASK_PIPE0 (Results 1 – 4 of 4) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_10_0_enum.h381 DCIO_EXT_VSYNC_MASK_PIPE0 = 0x1, enumerator
H A Ddce_11_0_enum.h1146 DCIO_EXT_VSYNC_MASK_PIPE0 = 0x1, enumerator
H A Ddce_11_2_enum.h1545 DCIO_EXT_VSYNC_MASK_PIPE0 = 0x1, enumerator
/dragonfly/sys/dev/drm/amd/include/
H A Dvega10_enum.h12138 DCIO_EXT_VSYNC_MASK_PIPE0 = 0x00000001, enumerator