Home
last modified time | relevance | path

Searched refs:DCIO_GPU_TIMER_READ_SELECT_UPPER_D4_V_UPDATE (Results 1 – 3 of 3) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_10_0_enum.h425 DCIO_GPU_TIMER_READ_SELECT_UPPER_D4_V_UPDATE = 0x7, enumerator
H A Ddce_11_2_enum.h1597 DCIO_GPU_TIMER_READ_SELECT_UPPER_D4_V_UPDATE = 0x7, enumerator
/dragonfly/sys/dev/drm/amd/include/
H A Dvega10_enum.h12215 DCIO_GPU_TIMER_READ_SELECT_UPPER_D4_V_UPDATE = 0x00000007, enumerator