Searched refs:DPLL_CTRL1_HDMI_MODE (Results 1 – 4 of 4) sorted by relevance
925 val &= ~(DPLL_CTRL1_HDMI_MODE(pll->id) | DPLL_CTRL1_SSC(pll->id) | in skl_ddi_pll_write_ctrl1()1000 if (val & DPLL_CTRL1_HDMI_MODE(pll->id)) { in skl_ddi_pll_get_hw_state()1300 ctrl1 |= DPLL_CTRL1_HDMI_MODE(0); in skl_ddi_hdmi_pll_dividers()
768 if (WARN_ON((val & (DPLL_CTRL1_HDMI_MODE(SKL_DPLL0) | in skl_dpll0_update()878 val &= ~(DPLL_CTRL1_HDMI_MODE(SKL_DPLL0) | DPLL_CTRL1_SSC(SKL_DPLL0) | in skl_dpll0_enable()
1367 if (dpll_ctl1 & DPLL_CTRL1_HDMI_MODE(pll_id)) { in skl_ddi_clock_get()
8540 #define DPLL_CTRL1_HDMI_MODE(id) (1<<((id)*6+5)) macro