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Searched refs:GPU_GARLIC_FLUSH_DONE__CP0__SHIFT (Results 1 – 3 of 3) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/bif/
H A Dbif_4_1_sh_mask.h754 #define GPU_GARLIC_FLUSH_DONE__CP0__SHIFT 0x0 macro
H A Dbif_5_0_sh_mask.h848 #define GPU_GARLIC_FLUSH_DONE__CP0__SHIFT 0x0 macro
H A Dbif_5_1_sh_mask.h818 #define GPU_GARLIC_FLUSH_DONE__CP0__SHIFT 0x0 macro