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Searched refs:MPLL_BYPASSCLK_SEL (Results 1 – 4 of 4) sorted by relevance

/dragonfly/sys/dev/drm/radeon/
H A Dsid.h155 #define MPLL_BYPASSCLK_SEL 0x65c macro
H A Dcikd.h277 #define MPLL_BYPASSCLK_SEL 0xC050019C macro
H A Dsi.c7418 orig = data = RREG32(MPLL_BYPASSCLK_SEL); in si_program_aspm()
7422 WREG32(MPLL_BYPASSCLK_SEL, data); in si_program_aspm()
H A Dcik.c9754 orig = data = RREG32_SMC(MPLL_BYPASSCLK_SEL); in cik_program_aspm()
9758 WREG32_SMC(MPLL_BYPASSCLK_SEL, data); in cik_program_aspm()