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Searched refs:PB1_GLB_SCI_STAT_OVRD_REG0__RXIMP__SHIFT (Results 1 – 3 of 3) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/bif/
H A Dbif_3_0_sh_mask.h3705 #define PB1_GLB_SCI_STAT_OVRD_REG0__RXIMP__SHIFT 0x00000010 macro
H A Dbif_4_1_sh_mask.h5878 #define PB1_GLB_SCI_STAT_OVRD_REG0__RXIMP__SHIFT 0x10 macro
H A Dbif_5_0_sh_mask.h6384 #define PB1_GLB_SCI_STAT_OVRD_REG0__RXIMP__SHIFT 0x10 macro