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Searched refs:PB1_TX_GLB_COEFF_ACCEPT_TABLE_REG0__ACCEPT_ENTRY_24__SHIFT (Results 1 – 3 of 3) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/bif/
H A Dbif_3_0_sh_mask.h5601 #define PB1_TX_GLB_COEFF_ACCEPT_TABLE_REG0__ACCEPT_ENTRY_24__SHIFT 0x00000018 macro
H A Dbif_4_1_sh_mask.h7188 #define PB1_TX_GLB_COEFF_ACCEPT_TABLE_REG0__ACCEPT_ENTRY_24__SHIFT 0x18 macro
H A Dbif_5_0_sh_mask.h7782 #define PB1_TX_GLB_COEFF_ACCEPT_TABLE_REG0__ACCEPT_ENTRY_24__SHIFT 0x18 macro