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Searched refs:PCIEP_PORT_CNTL__NATIVE_PME_EN__SHIFT (Results 1 – 5 of 5) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/bif/
H A Dbif_3_0_sh_mask.h7545 #define PCIEP_PORT_CNTL__NATIVE_PME_EN__SHIFT 0x00000003 macro
H A Dbif_4_1_sh_mask.h2752 #define PCIEP_PORT_CNTL__NATIVE_PME_EN__SHIFT 0x3 macro
H A Dbif_5_0_sh_mask.h10432 #define PCIEP_PORT_CNTL__NATIVE_PME_EN__SHIFT 0x3 macro
H A Dbif_5_1_sh_mask.h3708 #define PCIEP_PORT_CNTL__NATIVE_PME_EN__SHIFT 0x3 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/nbio/
H A Dnbio_6_1_sh_mask.h37577 #define PCIEP_PORT_CNTL__NATIVE_PME_EN__SHIFT … macro