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Searched refs:PCIE_LC_CNTL3__LC_N_EIE_SEL__SHIFT (Results 1 – 5 of 5) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/bif/
H A Dbif_3_0_sh_mask.h6965 #define PCIE_LC_CNTL3__LC_N_EIE_SEL__SHIFT 0x0000001f macro
H A Dbif_4_1_sh_mask.h3132 #define PCIE_LC_CNTL3__LC_N_EIE_SEL__SHIFT 0x1f macro
H A Dbif_5_0_sh_mask.h10864 #define PCIE_LC_CNTL3__LC_N_EIE_SEL__SHIFT 0x1f macro
H A Dbif_5_1_sh_mask.h4088 #define PCIE_LC_CNTL3__LC_N_EIE_SEL__SHIFT 0x1f macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/nbio/
H A Dnbio_6_1_sh_mask.h38312 #define PCIE_LC_CNTL3__LC_N_EIE_SEL__SHIFT … macro