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Searched refs:PCIE_LC_STATUS1__LC_OPERATING_LINK_WIDTH_MASK (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/amdgpu/
H A Dcik.c1442 current_lw = (tmp & PCIE_LC_STATUS1__LC_OPERATING_LINK_WIDTH_MASK) in cik_pcie_gen3_enable()
/dragonfly/sys/dev/drm/amd/include/asic_reg/bif/
H A Dbif_3_0_sh_mask.h7294 #define PCIE_LC_STATUS1__LC_OPERATING_LINK_WIDTH_MASK 0x0000001cL macro
H A Dbif_4_1_sh_mask.h2213 #define PCIE_LC_STATUS1__LC_OPERATING_LINK_WIDTH_MASK 0x1c macro
H A Dbif_5_0_sh_mask.h2801 #define PCIE_LC_STATUS1__LC_OPERATING_LINK_WIDTH_MASK 0x1c macro
H A Dbif_5_1_sh_mask.h3169 #define PCIE_LC_STATUS1__LC_OPERATING_LINK_WIDTH_MASK 0x1c macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_0_sh_mask.h74341 #define PCIE_LC_STATUS1__LC_OPERATING_LINK_WIDTH_MASK … macro
H A Dnbio_6_1_sh_mask.h38964 #define PCIE_LC_STATUS1__LC_OPERATING_LINK_WIDTH_MASK … macro