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Searched refs:PCIE_PERF_CNTL_SLV_R_CLK__COUNTER1_UPPER__SHIFT (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/bif/
H A Dbif_3_0_sh_mask.h7435 #define PCIE_PERF_CNTL_SLV_R_CLK__COUNTER1_UPPER__SHIFT 0x00000018 macro
H A Dbif_4_1_sh_mask.h2388 #define PCIE_PERF_CNTL_SLV_R_CLK__COUNTER1_UPPER__SHIFT 0x18 macro
H A Dbif_5_0_sh_mask.h3000 #define PCIE_PERF_CNTL_SLV_R_CLK__COUNTER1_UPPER__SHIFT 0x18 macro
H A Dbif_5_1_sh_mask.h3344 #define PCIE_PERF_CNTL_SLV_R_CLK__COUNTER1_UPPER__SHIFT 0x18 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_0_sh_mask.h74626 #define PCIE_PERF_CNTL_SLV_R_CLK__COUNTER1_UPPER__SHIFT … macro
H A Dnbio_6_1_sh_mask.h39217 #define PCIE_PERF_CNTL_SLV_R_CLK__COUNTER1_UPPER__SHIFT … macro