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Searched refs:Q_ADDR (Results 1 – 2 of 2) sorted by relevance

/dragonfly/sys/dev/netif/msk/
H A Dif_msk.c3507 CSR_WRITE_2(sc, Q_ADDR(sc_if->msk_txq, Q_WM), MSK_BMU_TX_WM); in msk_init()
3512 CSR_WRITE_2(sc, Q_ADDR(sc_if->msk_txq, Q_AL), in msk_init()
3522 CSR_WRITE_4(sc, Q_ADDR(sc_if->msk_txq, Q_F), in msk_init()
3532 CSR_WRITE_2(sc, Q_ADDR(sc_if->msk_rxq, Q_WM), MSK_BMU_RX_WM); in msk_init()
3544 CSR_WRITE_4(sc, Q_ADDR(sc_if->msk_rxq, Q_CSR), in msk_init()
3712 CSR_WRITE_4(sc, Q_ADDR(sc_if->msk_txq, Q_CSR), BMU_STOP); in msk_stop()
3713 val = CSR_READ_4(sc, Q_ADDR(sc_if->msk_txq, Q_CSR)); in msk_stop()
3716 CSR_WRITE_4(sc, Q_ADDR(sc_if->msk_txq, Q_CSR), in msk_stop()
3718 val = CSR_READ_4(sc, Q_ADDR(sc_if->msk_txq, Q_CSR)); in msk_stop()
3737 CSR_WRITE_4(sc, Q_ADDR(sc_if->msk_txq, Q_CSR), in msk_stop()
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H A Dif_mskreg.h578 #define Q_ADDR(Queue, Offs) (B8_Q_REGS + (Queue) + (Offs)) macro