Searched refs:RADEON_MCLK_CNTL (Results 1 – 3 of 3) sorted by relevance
84 post_div = RREG32_PLL(RADEON_MCLK_CNTL) & 0x7; in radeon_legacy_get_memory_clock()601 tmp = RREG32_PLL(RADEON_MCLK_CNTL); in radeon_legacy_set_clock_gating()616 tmp = RREG32_PLL(RADEON_MCLK_CNTL); in radeon_legacy_set_clock_gating()631 WREG32_PLL(RADEON_MCLK_CNTL, tmp); in radeon_legacy_set_clock_gating()808 tmp = RREG32_PLL(RADEON_MCLK_CNTL); in radeon_legacy_set_clock_gating()813 WREG32_PLL(RADEON_MCLK_CNTL, tmp); in radeon_legacy_set_clock_gating()878 tmp = RREG32_PLL(RADEON_MCLK_CNTL); in radeon_legacy_set_clock_gating()881 WREG32_PLL(RADEON_MCLK_CNTL, tmp); in radeon_legacy_set_clock_gating()
3149 (RADEON_MCLK_CNTL); in combios_parse_pll_table()3152 WREG32_PLL(RADEON_MCLK_CNTL, in combios_parse_pll_table()
1175 #define RADEON_MCLK_CNTL 0x0012 /* PLL */ macro