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Searched refs:SDMA0_GFX_RB_BASE_HI (Results 1 – 2 of 2) sorted by relevance

/dragonfly/sys/dev/drm/radeon/
H A Dcik_sdma.c407 WREG32(SDMA0_GFX_RB_BASE_HI + reg_offset, ring->gpu_addr >> 40); in cik_sdma_gfx_resume()
H A Dcikd.h1988 #define SDMA0_GFX_RB_BASE_HI 0xD208 macro