Searched refs:SH_MEM_CONFIG (Results 1 – 5 of 5) sorted by relevance
/dragonfly/sys/dev/drm/radeon/ |
H A D | cik_sdma.c | 969 radeon_ring_write(ring, SH_MEM_CONFIG >> 2); in cik_dma_vm_flush()
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H A D | cikd.h | 1171 #define SH_MEM_CONFIG 0x8C34 macro
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H A D | cik.c | 5542 WREG32(SH_MEM_CONFIG, SH_MEM_CONFIG_GFX_DEFAULT); in cik_pcie_gart_enable()
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/dragonfly/sys/dev/drm/amd/amdgpu/ |
H A D | gfx_v8_0.c | 3887 tmp = REG_SET_FIELD(0, SH_MEM_CONFIG, DEFAULT_MTYPE, MTYPE_UC); in gfx_v8_0_gpu_init() 3888 tmp = REG_SET_FIELD(tmp, SH_MEM_CONFIG, APE1_MTYPE, MTYPE_UC); in gfx_v8_0_gpu_init() 3889 tmp = REG_SET_FIELD(tmp, SH_MEM_CONFIG, ALIGNMENT_MODE, in gfx_v8_0_gpu_init() 3894 tmp = REG_SET_FIELD(0, SH_MEM_CONFIG, DEFAULT_MTYPE, MTYPE_NC); in gfx_v8_0_gpu_init() 3895 tmp = REG_SET_FIELD(tmp, SH_MEM_CONFIG, APE1_MTYPE, MTYPE_UC); in gfx_v8_0_gpu_init() 3896 tmp = REG_SET_FIELD(tmp, SH_MEM_CONFIG, ALIGNMENT_MODE, in gfx_v8_0_gpu_init()
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H A D | gfx_v9_0.c | 1785 tmp = REG_SET_FIELD(0, SH_MEM_CONFIG, ALIGNMENT_MODE, in gfx_v9_0_gpu_init() 1790 tmp = REG_SET_FIELD(0, SH_MEM_CONFIG, ALIGNMENT_MODE, in gfx_v9_0_gpu_init()
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