1 /*-
2 * Copyright (c) 2005 Ruslan Ermilov
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD: src/sys/pci/amdsmb.c,v 1.6 2008/06/06 18:29:56 jhb Exp $
27 */
28
29 #include <sys/param.h>
30 #include <sys/bus.h>
31 #include <sys/globaldata.h>
32 #include <sys/kernel.h>
33 #include <sys/lock.h>
34 #include <sys/module.h>
35 #include <sys/systm.h>
36
37 #include <sys/rman.h>
38
39 #include <bus/pci/pcivar.h>
40 #include <bus/pci/pcireg.h>
41
42 #include <bus/smbus/smbconf.h>
43 #include "smbus_if.h"
44
45 #define AMDSMB_DEBUG(x) if (amdsmb_debug) (x)
46
47 #ifdef DEBUG
48 static int amdsmb_debug = 1;
49 #else
50 static int amdsmb_debug = 0;
51 #endif
52
53 #define AMDSMB_VENDORID_AMD 0x1022
54 #define AMDSMB_DEVICEID_AMD8111_SMB2 0x746a
55
56 /*
57 * ACPI 3.0, Chapter 12, Embedded Controller Interface.
58 */
59 #define EC_DATA 0x00 /* data register */
60 #define EC_SC 0x04 /* status of controller */
61 #define EC_CMD 0x04 /* command register */
62
63 #define EC_SC_IBF 0x02 /* data ready for embedded controller */
64 #define EC_SC_OBF 0x01 /* data ready for host */
65 #define EC_CMD_WR 0x81 /* write EC */
66 #define EC_CMD_RD 0x80 /* read EC */
67
68 /*
69 * ACPI 3.0, Chapter 12, SMBus Host Controller Interface.
70 */
71 #define SMB_PRTCL 0x00 /* protocol */
72 #define SMB_STS 0x01 /* status */
73 #define SMB_ADDR 0x02 /* address */
74 #define SMB_CMD 0x03 /* command */
75 #define SMB_DATA 0x04 /* 32 data registers */
76 #define SMB_BCNT 0x24 /* number of data bytes */
77 #define SMB_ALRM_A 0x25 /* alarm address */
78 #define SMB_ALRM_D 0x26 /* 2 bytes alarm data */
79
80 #define SMB_STS_DONE 0x80
81 #define SMB_STS_ALRM 0x40
82 #define SMB_STS_RES 0x20
83 #define SMB_STS_STATUS 0x1f
84 #define SMB_STS_OK 0x00 /* OK */
85 #define SMB_STS_UF 0x07 /* Unknown Failure */
86 #define SMB_STS_DANA 0x10 /* Device Address Not Acknowledged */
87 #define SMB_STS_DED 0x11 /* Device Error Detected */
88 #define SMB_STS_DCAD 0x12 /* Device Command Access Denied */
89 #define SMB_STS_UE 0x13 /* Unknown Error */
90 #define SMB_STS_DAD 0x17 /* Device Access Denied */
91 #define SMB_STS_T 0x18 /* Timeout */
92 #define SMB_STS_HUP 0x19 /* Host Unsupported Protocol */
93 #define SMB_STS_B 0x1a /* Busy */
94 #define SMB_STS_PEC 0x1f /* PEC (CRC-8) Error */
95
96 #define SMB_PRTCL_WRITE 0x00
97 #define SMB_PRTCL_READ 0x01
98 #define SMB_PRTCL_QUICK 0x02
99 #define SMB_PRTCL_BYTE 0x04
100 #define SMB_PRTCL_BYTE_DATA 0x06
101 #define SMB_PRTCL_WORD_DATA 0x08
102 #define SMB_PRTCL_BLOCK_DATA 0x0a
103 #define SMB_PRTCL_PROC_CALL 0x0c
104 #define SMB_PRTCL_BLOCK_PROC_CALL 0x0d
105 #define SMB_PRTCL_PEC 0x80
106
107 struct amdsmb_softc {
108 int rid;
109 struct resource *res;
110 device_t smbus;
111 struct lock lock;
112 };
113
114 #define AMDSMB_LOCK(amdsmb) lockmgr(&(amdsmb)->lock, LK_EXCLUSIVE)
115 #define AMDSMB_UNLOCK(amdsmb) lockmgr(&(amdsmb)->lock, LK_RELEASE)
116 #define AMDSMB_LOCK_ASSERT(amdsmb) KKASSERT(lockstatus(&(amdsmb)->lock, curthread) != 0)
117
118 #define AMDSMB_ECINB(amdsmb, register) \
119 (bus_read_1(amdsmb->res, register))
120 #define AMDSMB_ECOUTB(amdsmb, register, value) \
121 (bus_write_1(amdsmb->res, register, value))
122
123 static int amdsmb_detach(device_t dev);
124
125 static int
amdsmb_probe(device_t dev)126 amdsmb_probe(device_t dev)
127 {
128 u_int16_t vid;
129 u_int16_t did;
130
131 vid = pci_get_vendor(dev);
132 did = pci_get_device(dev);
133
134 if (vid == AMDSMB_VENDORID_AMD) {
135 switch(did) {
136 case AMDSMB_DEVICEID_AMD8111_SMB2:
137 device_set_desc(dev, "AMD-8111 SMBus 2.0 Controller");
138 return (BUS_PROBE_DEFAULT);
139 }
140 }
141
142 return (ENXIO);
143 }
144
145 static int
amdsmb_attach(device_t dev)146 amdsmb_attach(device_t dev)
147 {
148 struct amdsmb_softc *amdsmb_sc = device_get_softc(dev);
149
150 /* Allocate I/O space */
151 amdsmb_sc->rid = PCIR_BAR(0);
152
153 amdsmb_sc->res = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
154 &amdsmb_sc->rid, RF_ACTIVE);
155
156 if (amdsmb_sc->res == NULL) {
157 device_printf(dev, "could not map i/o space\n");
158 return (ENXIO);
159 }
160
161 lockinit(&amdsmb_sc->lock, "amdsmb", 0, LK_CANRECURSE);
162
163 /* Allocate a new smbus device */
164 amdsmb_sc->smbus = device_add_child(dev, "smbus", -1);
165 if (!amdsmb_sc->smbus) {
166 amdsmb_detach(dev);
167 return (EINVAL);
168 }
169
170 bus_generic_attach(dev);
171
172 return (0);
173 }
174
175 static int
amdsmb_detach(device_t dev)176 amdsmb_detach(device_t dev)
177 {
178 struct amdsmb_softc *amdsmb_sc = device_get_softc(dev);
179
180 if (amdsmb_sc->smbus) {
181 device_delete_child(dev, amdsmb_sc->smbus);
182 amdsmb_sc->smbus = NULL;
183 }
184
185 lockuninit(&amdsmb_sc->lock);
186 if (amdsmb_sc->res)
187 bus_release_resource(dev, SYS_RES_IOPORT, amdsmb_sc->rid,
188 amdsmb_sc->res);
189
190 return (0);
191 }
192
193 static int
amdsmb_callback(device_t dev,int index,void * data)194 amdsmb_callback(device_t dev, int index, void *data)
195 {
196 int error = 0;
197
198 switch (index) {
199 case SMB_REQUEST_BUS:
200 case SMB_RELEASE_BUS:
201 break;
202 default:
203 error = EINVAL;
204 }
205
206 return (error);
207 }
208
209 static int
amdsmb_ec_wait_write(struct amdsmb_softc * sc)210 amdsmb_ec_wait_write(struct amdsmb_softc *sc)
211 {
212 int timeout = 500;
213
214 while (timeout-- && AMDSMB_ECINB(sc, EC_SC) & EC_SC_IBF)
215 DELAY(1);
216 if (timeout == 0) {
217 device_printf(sc->smbus, "timeout waiting for IBF to clear\n");
218 return (1);
219 }
220 return (0);
221 }
222
223 static int
amdsmb_ec_wait_read(struct amdsmb_softc * sc)224 amdsmb_ec_wait_read(struct amdsmb_softc *sc)
225 {
226 int timeout = 500;
227
228 while (timeout-- && ~AMDSMB_ECINB(sc, EC_SC) & EC_SC_OBF)
229 DELAY(1);
230 if (timeout == 0) {
231 device_printf(sc->smbus, "timeout waiting for OBF to set\n");
232 return (1);
233 }
234 return (0);
235 }
236
237 static int
amdsmb_ec_read(struct amdsmb_softc * sc,u_char addr,u_char * data)238 amdsmb_ec_read(struct amdsmb_softc *sc, u_char addr, u_char *data)
239 {
240 *data = 0;
241 AMDSMB_LOCK_ASSERT(sc);
242 if (amdsmb_ec_wait_write(sc))
243 return (1);
244 AMDSMB_ECOUTB(sc, EC_CMD, EC_CMD_RD);
245
246 if (amdsmb_ec_wait_write(sc))
247 return (1);
248 AMDSMB_ECOUTB(sc, EC_DATA, addr);
249
250 if (amdsmb_ec_wait_read(sc))
251 return (1);
252 *data = AMDSMB_ECINB(sc, EC_DATA);
253
254 return (0);
255 }
256
257 static int
amdsmb_ec_write(struct amdsmb_softc * sc,u_char addr,u_char data)258 amdsmb_ec_write(struct amdsmb_softc *sc, u_char addr, u_char data)
259 {
260
261 AMDSMB_LOCK_ASSERT(sc);
262 if (amdsmb_ec_wait_write(sc))
263 return (1);
264 AMDSMB_ECOUTB(sc, EC_CMD, EC_CMD_WR);
265
266 if (amdsmb_ec_wait_write(sc))
267 return (1);
268 AMDSMB_ECOUTB(sc, EC_DATA, addr);
269
270 if (amdsmb_ec_wait_write(sc))
271 return (1);
272 AMDSMB_ECOUTB(sc, EC_DATA, data);
273
274 return (0);
275 }
276
277 static int
amdsmb_wait(struct amdsmb_softc * sc)278 amdsmb_wait(struct amdsmb_softc *sc)
279 {
280 u_char sts, temp;
281 int error, count;
282
283 AMDSMB_LOCK_ASSERT(sc);
284 amdsmb_ec_read(sc, SMB_PRTCL, &temp);
285 if (temp != 0)
286 {
287 count = 10000;
288 do {
289 DELAY(500);
290 amdsmb_ec_read(sc, SMB_PRTCL, &temp);
291 } while (temp != 0 && count--);
292 if (count == 0)
293 return (SMB_ETIMEOUT);
294 }
295
296 sts = 0;
297 amdsmb_ec_read(sc, SMB_STS, &sts);
298 sts &= SMB_STS_STATUS;
299 AMDSMB_DEBUG(kprintf("amdsmb: STS=0x%x\n", sts));
300
301 switch (sts) {
302 case SMB_STS_OK:
303 error = SMB_ENOERR;
304 break;
305 case SMB_STS_DANA:
306 error = SMB_ENOACK;
307 break;
308 case SMB_STS_B:
309 error = SMB_EBUSY;
310 break;
311 case SMB_STS_T:
312 error = SMB_ETIMEOUT;
313 break;
314 case SMB_STS_DCAD:
315 case SMB_STS_DAD:
316 case SMB_STS_HUP:
317 error = SMB_ENOTSUPP;
318 break;
319 default:
320 error = SMB_EBUSERR;
321 break;
322 }
323
324 return (error);
325 }
326
327 static int
amdsmb_quick(device_t dev,u_char slave,int how)328 amdsmb_quick(device_t dev, u_char slave, int how)
329 {
330 struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
331 u_char protocol;
332 int error;
333
334 protocol = SMB_PRTCL_QUICK;
335
336 switch (how) {
337 case SMB_QWRITE:
338 protocol |= SMB_PRTCL_WRITE;
339 AMDSMB_DEBUG(kprintf("amdsmb: QWRITE to 0x%x", slave));
340 break;
341 case SMB_QREAD:
342 protocol |= SMB_PRTCL_READ;
343 AMDSMB_DEBUG(kprintf("amdsmb: QREAD to 0x%x", slave));
344 break;
345 default:
346 panic("%s: unknown QUICK command (%x)!", __func__, how);
347 }
348
349 AMDSMB_LOCK(sc);
350 amdsmb_ec_write(sc, SMB_ADDR, slave);
351 amdsmb_ec_write(sc, SMB_PRTCL, protocol);
352
353 error = amdsmb_wait(sc);
354
355 AMDSMB_DEBUG(kprintf(", error=0x%x\n", error));
356 AMDSMB_UNLOCK(sc);
357
358 return (error);
359 }
360
361 static int
amdsmb_sendb(device_t dev,u_char slave,char byte)362 amdsmb_sendb(device_t dev, u_char slave, char byte)
363 {
364 struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
365 int error;
366
367 AMDSMB_LOCK(sc);
368 amdsmb_ec_write(sc, SMB_CMD, byte);
369 amdsmb_ec_write(sc, SMB_ADDR, slave);
370 amdsmb_ec_write(sc, SMB_PRTCL, SMB_PRTCL_WRITE | SMB_PRTCL_BYTE);
371
372 error = amdsmb_wait(sc);
373
374 AMDSMB_DEBUG(kprintf("amdsmb: SENDB to 0x%x, byte=0x%x, error=0x%x\n",
375 slave, byte, error));
376 AMDSMB_UNLOCK(sc);
377
378 return (error);
379 }
380
381 static int
amdsmb_recvb(device_t dev,u_char slave,char * byte)382 amdsmb_recvb(device_t dev, u_char slave, char *byte)
383 {
384 struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
385 int error;
386
387 AMDSMB_LOCK(sc);
388 amdsmb_ec_write(sc, SMB_ADDR, slave);
389 amdsmb_ec_write(sc, SMB_PRTCL, SMB_PRTCL_READ | SMB_PRTCL_BYTE);
390
391 if ((error = amdsmb_wait(sc)) == SMB_ENOERR)
392 amdsmb_ec_read(sc, SMB_DATA, byte);
393
394 AMDSMB_DEBUG(kprintf("amdsmb: RECVB from 0x%x, byte=0x%x, error=0x%x\n",
395 slave, *byte, error));
396 AMDSMB_UNLOCK(sc);
397
398 return (error);
399 }
400
401 static int
amdsmb_writeb(device_t dev,u_char slave,char cmd,char byte)402 amdsmb_writeb(device_t dev, u_char slave, char cmd, char byte)
403 {
404 struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
405 int error;
406
407 AMDSMB_LOCK(sc);
408 amdsmb_ec_write(sc, SMB_CMD, cmd);
409 amdsmb_ec_write(sc, SMB_DATA, byte);
410 amdsmb_ec_write(sc, SMB_ADDR, slave);
411 amdsmb_ec_write(sc, SMB_PRTCL, SMB_PRTCL_WRITE | SMB_PRTCL_BYTE_DATA);
412
413 error = amdsmb_wait(sc);
414
415 AMDSMB_DEBUG(kprintf("amdsmb: WRITEB to 0x%x, cmd=0x%x, byte=0x%x, "
416 "error=0x%x\n", slave, cmd, byte, error));
417 AMDSMB_UNLOCK(sc);
418
419 return (error);
420 }
421
422 static int
amdsmb_readb(device_t dev,u_char slave,char cmd,char * byte)423 amdsmb_readb(device_t dev, u_char slave, char cmd, char *byte)
424 {
425 struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
426 int error;
427
428 AMDSMB_LOCK(sc);
429 amdsmb_ec_write(sc, SMB_CMD, cmd);
430 amdsmb_ec_write(sc, SMB_ADDR, slave);
431 amdsmb_ec_write(sc, SMB_PRTCL, SMB_PRTCL_READ | SMB_PRTCL_BYTE_DATA);
432
433 if ((error = amdsmb_wait(sc)) == SMB_ENOERR)
434 amdsmb_ec_read(sc, SMB_DATA, byte);
435
436 AMDSMB_DEBUG(kprintf("amdsmb: READB from 0x%x, cmd=0x%x, byte=0x%x, "
437 "error=0x%x\n", slave, cmd, (unsigned char)*byte, error));
438 AMDSMB_UNLOCK(sc);
439
440 return (error);
441 }
442
443 static int
amdsmb_writew(device_t dev,u_char slave,char cmd,short word)444 amdsmb_writew(device_t dev, u_char slave, char cmd, short word)
445 {
446 struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
447 int error;
448
449 AMDSMB_LOCK(sc);
450 amdsmb_ec_write(sc, SMB_CMD, cmd);
451 amdsmb_ec_write(sc, SMB_DATA, word);
452 amdsmb_ec_write(sc, SMB_DATA + 1, word >> 8);
453 amdsmb_ec_write(sc, SMB_ADDR, slave);
454 amdsmb_ec_write(sc, SMB_PRTCL, SMB_PRTCL_WRITE | SMB_PRTCL_WORD_DATA);
455
456 error = amdsmb_wait(sc);
457
458 AMDSMB_DEBUG(kprintf("amdsmb: WRITEW to 0x%x, cmd=0x%x, word=0x%x, "
459 "error=0x%x\n", slave, cmd, word, error));
460 AMDSMB_UNLOCK(sc);
461
462 return (error);
463 }
464
465 static int
amdsmb_readw(device_t dev,u_char slave,char cmd,short * word)466 amdsmb_readw(device_t dev, u_char slave, char cmd, short *word)
467 {
468 struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
469 u_char temp[2];
470 int error;
471
472 AMDSMB_LOCK(sc);
473 amdsmb_ec_write(sc, SMB_CMD, cmd);
474 amdsmb_ec_write(sc, SMB_ADDR, slave);
475 amdsmb_ec_write(sc, SMB_PRTCL, SMB_PRTCL_READ | SMB_PRTCL_WORD_DATA);
476
477 if ((error = amdsmb_wait(sc)) == SMB_ENOERR) {
478 amdsmb_ec_read(sc, SMB_DATA + 0, &temp[0]);
479 amdsmb_ec_read(sc, SMB_DATA + 1, &temp[1]);
480 *word = temp[0] | (temp[1] << 8);
481 }
482
483 AMDSMB_DEBUG(kprintf("amdsmb: READW from 0x%x, cmd=0x%x, word=0x%x, "
484 "error=0x%x\n", slave, cmd, (unsigned short)*word, error));
485 AMDSMB_UNLOCK(sc);
486
487 return (error);
488 }
489
490 static int
amdsmb_bwrite(device_t dev,u_char slave,char cmd,u_char count,char * buf)491 amdsmb_bwrite(device_t dev, u_char slave, char cmd, u_char count, char *buf)
492 {
493 struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
494 u_char i;
495 int error;
496
497 if (count < 1 || count > 32)
498 return (SMB_EINVAL);
499
500 AMDSMB_LOCK(sc);
501 amdsmb_ec_write(sc, SMB_CMD, cmd);
502 amdsmb_ec_write(sc, SMB_BCNT, count);
503 for (i = 0; i < count; i++)
504 amdsmb_ec_write(sc, SMB_DATA + i, buf[i]);
505 amdsmb_ec_write(sc, SMB_ADDR, slave);
506 amdsmb_ec_write(sc, SMB_PRTCL, SMB_PRTCL_WRITE | SMB_PRTCL_BLOCK_DATA);
507
508 error = amdsmb_wait(sc);
509
510 AMDSMB_DEBUG(kprintf("amdsmb: WRITEBLK to 0x%x, count=0x%x, cmd=0x%x, "
511 "error=0x%x", slave, count, cmd, error));
512 AMDSMB_UNLOCK(sc);
513
514 return (error);
515 }
516
517 static int
amdsmb_bread(device_t dev,u_char slave,char cmd,u_char * count,char * buf)518 amdsmb_bread(device_t dev, u_char slave, char cmd, u_char *count, char *buf)
519 {
520 struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
521 u_char data, len, i;
522 int error;
523
524 if (*count < 1 || *count > 32)
525 return (SMB_EINVAL);
526
527 AMDSMB_LOCK(sc);
528 amdsmb_ec_write(sc, SMB_CMD, cmd);
529 amdsmb_ec_write(sc, SMB_ADDR, slave);
530 amdsmb_ec_write(sc, SMB_PRTCL, SMB_PRTCL_READ | SMB_PRTCL_BLOCK_DATA);
531
532 if ((error = amdsmb_wait(sc)) == SMB_ENOERR) {
533 amdsmb_ec_read(sc, SMB_BCNT, &len);
534 for (i = 0; i < len; i++) {
535 amdsmb_ec_read(sc, SMB_DATA + i, &data);
536 if (i < *count)
537 buf[i] = data;
538 }
539 *count = len;
540 }
541
542 AMDSMB_DEBUG(kprintf("amdsmb: READBLK to 0x%x, count=0x%x, cmd=0x%x, "
543 "error=0x%x", slave, *count, cmd, error));
544 AMDSMB_UNLOCK(sc);
545
546 return (error);
547 }
548
549 static device_method_t amdsmb_methods[] = {
550 /* Device interface */
551 DEVMETHOD(device_probe, amdsmb_probe),
552 DEVMETHOD(device_attach, amdsmb_attach),
553 DEVMETHOD(device_detach, amdsmb_detach),
554
555 /* SMBus interface */
556 DEVMETHOD(smbus_callback, amdsmb_callback),
557 DEVMETHOD(smbus_quick, amdsmb_quick),
558 DEVMETHOD(smbus_sendb, amdsmb_sendb),
559 DEVMETHOD(smbus_recvb, amdsmb_recvb),
560 DEVMETHOD(smbus_writeb, amdsmb_writeb),
561 DEVMETHOD(smbus_readb, amdsmb_readb),
562 DEVMETHOD(smbus_writew, amdsmb_writew),
563 DEVMETHOD(smbus_readw, amdsmb_readw),
564 DEVMETHOD(smbus_bwrite, amdsmb_bwrite),
565 DEVMETHOD(smbus_bread, amdsmb_bread),
566
567 DEVMETHOD_END
568 };
569
570 static devclass_t amdsmb_devclass;
571
572 static driver_t amdsmb_driver = {
573 "amdsmb",
574 amdsmb_methods,
575 sizeof(struct amdsmb_softc),
576 };
577
578 DRIVER_MODULE(amdsmb, pci, amdsmb_driver, amdsmb_devclass, NULL, NULL);
579 DRIVER_MODULE(smbus, amdsmb, smbus_driver, smbus_devclass, NULL, NULL);
580
581 MODULE_DEPEND(amdsmb, pci, 1, 1, 1);
582 MODULE_DEPEND(amdsmb, smbus, SMBUS_MINVER, SMBUS_PREFVER, SMBUS_MAXVER);
583 MODULE_VERSION(amdsmb, 1);
584