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Searched refs:SMC_IND_ACCESS_CNTL (Results 1 – 8 of 8) sorted by relevance

/dragonfly/sys/dev/drm/radeon/
H A Dci_smc.c42 WREG32_P(SMC_IND_ACCESS_CNTL, 0, ~AUTO_INCREMENT_IND_0); in ci_set_smc_sram_address()
230 WREG32_P(SMC_IND_ACCESS_CNTL, AUTO_INCREMENT_IND_0, ~AUTO_INCREMENT_IND_0); in ci_load_smc_ucode()
240 WREG32_P(SMC_IND_ACCESS_CNTL, 0, ~AUTO_INCREMENT_IND_0); in ci_load_smc_ucode()
H A Dsi_smc.c42 WREG32_P(SMC_IND_ACCESS_CNTL, 0, ~AUTO_INCREMENT_IND_0); in si_set_smc_sram_address()
266 WREG32_P(SMC_IND_ACCESS_CNTL, AUTO_INCREMENT_IND_0, ~AUTO_INCREMENT_IND_0); in si_load_smc_ucode()
276 WREG32_P(SMC_IND_ACCESS_CNTL, 0, ~AUTO_INCREMENT_IND_0); in si_load_smc_ucode()
H A Dkv_smc.c84 WREG32_P(SMC_IND_ACCESS_CNTL, 0, ~AUTO_INCREMENT_IND_0); in kv_set_smc_sram_address()
H A Dsid.h55 #define SMC_IND_ACCESS_CNTL 0x228 macro
H A Dcikd.h425 #define SMC_IND_ACCESS_CNTL 0x240 macro
/dragonfly/sys/dev/drm/amd/powerplay/smumgr/
H A Dsmu7_smumgr.c44 …PHM_WRITE_FIELD(hwmgr->device, SMC_IND_ACCESS_CNTL, AUTO_INCREMENT_IND_11, 0); /* on ci, SMC_IND_A… in smu7_set_smc_sram_address()
507 PHM_WRITE_FIELD(hwmgr->device, SMC_IND_ACCESS_CNTL, AUTO_INCREMENT_IND_11, 1); in smu7_upload_smc_firmware_data()
512 PHM_WRITE_FIELD(hwmgr->device, SMC_IND_ACCESS_CNTL, AUTO_INCREMENT_IND_11, 0); in smu7_upload_smc_firmware_data()
H A Dci_smumgr.c103 PHM_WRITE_FIELD(hwmgr->device, SMC_IND_ACCESS_CNTL, AUTO_INCREMENT_IND_0, 0); in ci_set_smc_sram_address()
2329 PHM_WRITE_FIELD(hwmgr->device, SMC_IND_ACCESS_CNTL, AUTO_INCREMENT_IND_0, 1); in ci_load_smc_ucode()
2336 PHM_WRITE_FIELD(hwmgr->device, SMC_IND_ACCESS_CNTL, AUTO_INCREMENT_IND_0, 0); in ci_load_smc_ucode()
H A Diceland_smumgr.c166 PHM_WRITE_FIELD(hwmgr->device, SMC_IND_ACCESS_CNTL, AUTO_INCREMENT_IND_0, 1); in iceland_upload_smc_firmware_data()
175 PHM_WRITE_FIELD(hwmgr->device, SMC_IND_ACCESS_CNTL, AUTO_INCREMENT_IND_0, 0); in iceland_upload_smc_firmware_data()