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Searched refs:mmIH_RB_WPTR_ADDR_LO (Results 1 – 11 of 11) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/oss/
H A Doss_1_0_d.h235 #define mmIH_RB_WPTR_ADDR_LO 0x0F85 macro
H A Dosssys_4_0_1_offset.h132 #define mmIH_RB_WPTR_ADDR_LO … macro
H A Dosssys_4_0_offset.h132 #define mmIH_RB_WPTR_ADDR_LO … macro
H A Doss_2_4_d.h48 #define mmIH_RB_WPTR_ADDR_LO 0xe35 macro
H A Doss_3_0_1_d.h48 #define mmIH_RB_WPTR_ADDR_LO 0xe35 macro
H A Doss_2_0_d.h48 #define mmIH_RB_WPTR_ADDR_LO 0xf85 macro
H A Doss_3_0_d.h48 #define mmIH_RB_WPTR_ADDR_LO 0xe35 macro
/dragonfly/sys/dev/drm/amd/amdgpu/
H A Dcz_ih.c137 WREG32(mmIH_RB_WPTR_ADDR_LO, lower_32_bits(wptr_off)); in cz_ih_irq_init()
H A Diceland_ih.c137 WREG32(mmIH_RB_WPTR_ADDR_LO, lower_32_bits(wptr_off)); in iceland_ih_irq_init()
H A Dtonga_ih.c143 WREG32(mmIH_RB_WPTR_ADDR_LO, lower_32_bits(wptr_off)); in tonga_ih_irq_init()
H A Dvega10_ih.c131 WREG32_SOC15(OSSSYS, 0, mmIH_RB_WPTR_ADDR_LO, lower_32_bits(wptr_off)); in vega10_ih_irq_init()