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Searched refs:BaseOps2 (Results 1 – 9 of 9) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfo.h162 ArrayRef<const MachineOperand *> BaseOps2,
H A DRISCVInstrInfo.cpp2246 ArrayRef<const MachineOperand *> BaseOps2) { in memOpsHaveSameBasePtr() argument
2250 if (BaseOps1.front()->isIdenticalTo(*BaseOps2.front())) in memOpsHaveSameBasePtr()
2276 bool OffsetIsScalable1, ArrayRef<const MachineOperand *> BaseOps2, in shouldClusterMemOps() argument
2281 if (!BaseOps1.empty() && !BaseOps2.empty()) { in shouldClusterMemOps()
2283 const MachineInstr &SecondLdSt = *BaseOps2.front()->getParent(); in shouldClusterMemOps()
2284 if (!memOpsHaveSameBasePtr(FirstLdSt, BaseOps1, SecondLdSt, BaseOps2)) in shouldClusterMemOps()
2286 } else if (!BaseOps1.empty() || !BaseOps2.empty()) { in shouldClusterMemOps()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64InstrInfo.h183 ArrayRef<const MachineOperand *> BaseOps2,
H A DAArch64InstrInfo.cpp4254 bool OffsetIsScalable1, ArrayRef<const MachineOperand *> BaseOps2, in shouldClusterMemOps() argument
4257 assert(BaseOps1.size() == 1 && BaseOps2.size() == 1); in shouldClusterMemOps()
4259 const MachineOperand &BaseOp2 = *BaseOps2.front(); in shouldClusterMemOps()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.h563 ArrayRef<const MachineOperand *> BaseOps2,
H A DPPCInstrInfo.cpp2874 bool OffsetIsScalable1, ArrayRef<const MachineOperand *> BaseOps2, in shouldClusterMemOps() argument
2878 assert(BaseOps1.size() == 1 && BaseOps2.size() == 1); in shouldClusterMemOps()
2880 const MachineOperand &BaseOp2 = *BaseOps2.front(); in shouldClusterMemOps()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIInstrInfo.cpp522 ArrayRef<const MachineOperand *> BaseOps2) { in memOpsHaveSameBasePtr() argument
526 if (BaseOps1.front()->isIdenticalTo(*BaseOps2.front())) in memOpsHaveSameBasePtr()
552 ArrayRef<const MachineOperand *> BaseOps2, in shouldClusterMemOps() argument
558 if (!BaseOps1.empty() && !BaseOps2.empty()) { in shouldClusterMemOps()
560 const MachineInstr &SecondLdSt = *BaseOps2.front()->getParent(); in shouldClusterMemOps()
561 if (!memOpsHaveSameBasePtr(FirstLdSt, BaseOps1, SecondLdSt, BaseOps2)) in shouldClusterMemOps()
563 } else if (!BaseOps1.empty() || !BaseOps2.empty()) { in shouldClusterMemOps()
3628 ArrayRef<const MachineOperand *> BaseOps2) { in memOpsHaveSameBaseOperands() argument
3629 if (BaseOps1.size() != BaseOps2.size()) in memOpsHaveSameBaseOperands()
3632 if (!BaseOps1[I]->isIdenticalTo(*BaseOps2[I])) in memOpsHaveSameBaseOperands()
H A DSIInstrInfo.h248 ArrayRef<const MachineOperand *> BaseOps2,
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetInstrInfo.h1527 ArrayRef<const MachineOperand *> BaseOps2, in shouldClusterMemOps() argument