| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | LoopBoundSplit.cpp | 53 Cond.ICmp = ICmp; in analyzeICmp()
54 if (match(ICmp, m_ICmp(Cond.Pred, m_Value(Cond.AddRecValue), in analyzeICmp()
62 std::swap(Cond.AddRecValue, Cond.BoundValue); in analyzeICmp()
64 Cond.Pred = ICmpInst::getSwappedPredicate(Cond.Pred); in analyzeICmp()
69 Cond.NonPHIAddRecValue = Cond.AddRecValue; in analyzeICmp()
73 if (Cond.AddRecSCEV && isa<PHINode>(Cond.AddRecValue)) { in analyzeICmp()
92 if (Cond.Pred == ICmpInst::ICMP_SLT || Cond.Pred == ICmpInst::ICMP_ULT) in calculateUpperBound()
98 if (Cond.Pred != ICmpInst::ICMP_ULE && Cond.Pred != ICmpInst::ICMP_SLE) in calculateUpperBound()
115 Cond.Pred = Pred; in calculateUpperBound()
219 Cond.BI = ExitingBI; in canSplitLoopBound()
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| /freebsd/contrib/llvm-project/clang/lib/StaticAnalyzer/Core/ |
| H A D | SimpleConstraintManager.cpp | 27 DefinedSVal Cond, in assumeInternal() argument
30 if (std::optional<Loc> LV = Cond.getAs<Loc>()) { in assumeInternal()
42 return assume(State, Cond.castAs<NonLoc>(), Assumption); in assumeInternal()
47 State = assumeAux(State, Cond, Assumption); in assume()
49 return EE->processAssume(State, Cond, Assumption); in assume()
54 NonLoc Cond, in assumeAux() argument
59 if (!canReasonAbout(Cond)) { in assumeAux()
61 SymbolRef Sym = Cond.getAsSymbol(); in assumeAux()
66 switch (Cond.getKind()) { in assumeAux()
71 nonloc::SymbolVal SV = Cond.castAs<nonloc::SymbolVal>(); in assumeAux()
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| H A D | ConstraintManager.cpp | 93 ConstraintManager::assumeDual(ProgramStateRef State, DefinedSVal Cond) { in assumeDual() argument
94 auto AssumeFun = [&, Cond](bool Assumption) { in assumeDual()
95 return assumeInternal(State, Cond, Assumption); in assumeDual()
111 DefinedSVal Cond, bool Assumption) { in assume() argument
112 ConstraintManager::ProgramStatePair R = assumeDual(State, Cond); in assume()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyInstrInfo.cpp | 110 Cond.push_back(MachineOperand::CreateImm(true)); in analyzeBranch()
111 Cond.push_back(MI.getOperand(1)); in analyzeBranch()
118 Cond.push_back(MachineOperand::CreateImm(false)); in analyzeBranch()
119 Cond.push_back(MI.getOperand(1)); in analyzeBranch()
164 if (Cond.empty()) { in insertBranch()
172 assert(Cond.size() == 2 && "Expected a flag and a successor block"); in insertBranch()
174 if (Cond[0].getImm()) in insertBranch()
175 BuildMI(&MBB, DL, get(WebAssembly::BR_IF)).addMBB(TBB).add(Cond[1]); in insertBranch()
186 SmallVectorImpl<MachineOperand> &Cond) const { in reverseBranchCondition()
187 assert(Cond.size() == 2 && "Expected a flag and a condition expression"); in reverseBranchCondition()
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| H A D | WebAssemblyLowerBrUnless.cpp | 70 Register Cond = MI.getOperand(1).getReg(); in runOnMachineFunction() local
74 if (MFI.isVRegStackified(Cond)) { in runOnMachineFunction()
75 assert(MRI.hasOneDef(Cond)); in runOnMachineFunction()
76 MachineInstr *Def = MRI.getVRegDef(Cond); in runOnMachineFunction()
177 Cond = Def->getOperand(1).getReg(); in runOnMachineFunction()
192 .addReg(Cond); in runOnMachineFunction()
194 Cond = Tmp; in runOnMachineFunction()
203 .addReg(Cond); in runOnMachineFunction()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
| H A D | LibCallsShrinkWrap.cpp | 74 void shrinkWrapCI(CallInst *CI, Value *Cond);
132 Value *Cond = nullptr; in performCallDomainErrorOnly() local
177 shrinkWrapCI(CI, Cond); in performCallDomainErrorOnly()
184 Value *Cond = nullptr; in performCallRangeErrorOnly() local
202 Cond = generateTwoRangeCond(CI, Func); in performCallRangeErrorOnly()
209 Cond = generateOneRangeCond(CI, Func); in performCallRangeErrorOnly()
215 shrinkWrapCI(CI, Cond); in performCallRangeErrorOnly()
222 Value *Cond = nullptr; in performCallErrors() local
269 Cond = generateCondForPow(CI, Func); in performCallErrors()
270 if (Cond == nullptr) in performCallErrors()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVRedundantCopyElimination.cpp | 75 const SmallVectorImpl<MachineOperand> &Cond, in guaranteesZeroRegInBlock() argument
77 assert(Cond.size() == 3 && "Unexpected number of operands"); in guaranteesZeroRegInBlock()
79 auto CC = static_cast<RISCVCC::CondCode>(Cond[0].getImm()); in guaranteesZeroRegInBlock()
80 if (CC == RISCVCC::COND_EQ && Cond[2].getReg() == RISCV::X0 && TBB == &MBB) in guaranteesZeroRegInBlock()
82 if (CC == RISCVCC::COND_NE && Cond[2].getReg() == RISCV::X0 && TBB != &MBB) in guaranteesZeroRegInBlock()
99 SmallVector<MachineOperand, 3> Cond; in optimizeBlock() local
100 if (TII->analyzeBranch(*PredMBB, TBB, FBB, Cond, /*AllowModify*/ false) || in optimizeBlock()
101 Cond.empty()) in optimizeBlock()
105 if (!guaranteesZeroRegInBlock(MBB, Cond, TBB)) in optimizeBlock()
108 Register TargetReg = Cond[1].getReg(); in optimizeBlock()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/ |
| H A D | MSP430InstrInfo.cpp | 133 reverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const { in reverseBranchCondition()
134 assert(Cond.size() == 1 && "Invalid Xbranch condition!"); in reverseBranchCondition()
160 Cond[0].setImm(CC); in reverseBranchCondition()
167 SmallVectorImpl<MachineOperand> &Cond, in analyzeBranch() argument
201 Cond.clear(); in analyzeBranch()
225 if (Cond.empty()) { in analyzeBranch()
228 Cond.push_back(MachineOperand::CreateImm(BranchCode)); in analyzeBranch()
234 assert(Cond.size() == 1); in analyzeBranch()
256 ArrayRef<MachineOperand> Cond, in insertBranch() argument
261 assert((Cond.size() == 1 || Cond.size() == 0) && in insertBranch()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/XCore/ |
| H A D | XCoreInstrInfo.cpp | 220 Cond.push_back(MachineOperand::CreateImm(BranchCode)); in analyzeBranch()
221 Cond.push_back(LastInst->getOperand(0)); in analyzeBranch()
241 Cond.push_back(MachineOperand::CreateImm(BranchCode)); in analyzeBranch()
242 Cond.push_back(SecondLastInst->getOperand(0)); in analyzeBranch()
279 assert((Cond.size() == 2 || Cond.size() == 0) && in insertBranch()
284 if (Cond.empty()) { in insertBranch()
290 BuildMI(&MBB, DL, get(Opc)).addReg(Cond[1].getReg()) in insertBranch()
297 assert(Cond.size() == 2 && "Unexpected number of components!"); in insertBranch()
299 BuildMI(&MBB, DL, get(Opc)).addReg(Cond[1].getReg()) in insertBranch()
401 assert((Cond.size() == 2) && in reverseBranchCondition()
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| /freebsd/contrib/llvm-project/clang/lib/Analysis/FlowSensitive/ |
| H A D | TypeErasedDataflowAnalysis.cpp | 82 auto *Cond = S->getCond(); in VisitIfStmt() local
83 assert(Cond != nullptr); in VisitIfStmt()
88 auto *Cond = S->getCond(); in VisitWhileStmt() local
89 assert(Cond != nullptr); in VisitWhileStmt()
94 auto *Cond = S->getCond(); in VisitDoStmt() local
95 assert(Cond != nullptr); in VisitDoStmt()
100 auto *Cond = S->getCond(); in VisitForStmt() local
101 if (Cond != nullptr) in VisitForStmt()
121 auto *Cond = S->getCond(); in VisitConditionalOperator() local
122 assert(Cond != nullptr); in VisitConditionalOperator()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCInstrInfo.cpp | 202 if (!Cond.empty()) in analyzeBranch()
208 Cond.push_back(I->getOperand(1)); in analyzeBranch()
209 Cond.push_back(I->getOperand(2)); in analyzeBranch()
210 Cond.push_back(I->getOperand(3)); in analyzeBranch()
225 Cond.clear(); in analyzeBranch()
350 SmallVectorImpl<MachineOperand> &Cond) const { in reverseBranchCondition()
351 assert((Cond.size() == 3) && "Invalid ARC branch condition!"); in reverseBranchCondition()
352 Cond[2].setImm(getOppositeBranchCondition((ARCCC::CondCode)Cond[2].getImm())); in reverseBranchCondition()
378 assert((Cond.size() == 3 || Cond.size() == 0) && in insertBranch()
381 if (Cond.empty()) { in insertBranch()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXInstrInfo.cpp | 93 SmallVectorImpl<MachineOperand> &Cond, in analyzeBranch() argument
111 Cond.push_back(LastInst.getOperand(0)); in analyzeBranch()
129 Cond.push_back(SecondLastInst.getOperand(0)); in analyzeBranch()
178 ArrayRef<MachineOperand> Cond, in insertBranch() argument
185 assert((Cond.size() == 1 || Cond.size() == 0) && in insertBranch()
190 if (Cond.empty()) // Unconditional branch in insertBranch()
193 BuildMI(&MBB, DL, get(NVPTX::CBranch)).add(Cond[0]).addMBB(TBB); in insertBranch()
198 BuildMI(&MBB, DL, get(NVPTX::CBranch)).add(Cond[0]).addMBB(TBB); in insertBranch()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchInstrInfo.cpp | 249 Cond.push_back(LastInst.getOperand(i)); in parseCondBranch()
258 Cond.clear(); in analyzeBranch()
296 parseCondBranch(*I, TBB, Cond); in analyzeBranch()
303 parseCondBranch(*std::prev(I), TBB, Cond); in analyzeBranch()
376 assert(Cond.size() <= 3 && Cond.size() != 1 && in insertBranch()
380 if (Cond.empty()) { in insertBranch()
389 for (unsigned i = 1; i < Cond.size(); ++i) in insertBranch()
390 MIB.add(Cond[i]); in insertBranch()
499 SmallVectorImpl<MachineOperand> &Cond) const { in reverseBranchCondition()
500 assert((Cond.size() && Cond.size() <= 3) && "Invalid branch condition!"); in reverseBranchCondition()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIAnnotateControlFlow.cpp | 212 Value *Cond = IRB.CreateExtractValue(IfCall, {0}); in openIf() local
214 Term->setCondition(Cond); in openIf()
227 Value *Cond = IRB.CreateExtractValue(ElseCall, {0}); in insertElse() local
229 Term->setCondition(Cond); in insertElse()
239 return IRBuilder<>(I).CreateCall(IfBreak, {Cond, Broken}); in handleLoopCondition()
242 if (Instruction *Inst = dyn_cast<Instruction>(Cond)) { in handleLoopCondition()
255 if (isa<Constant>(Cond)) { in handleLoopCondition()
256 Instruction *Insert = Cond == BoolTrue ? in handleLoopCondition()
262 if (isa<Argument>(Cond)) { in handleLoopCondition()
284 Value *Cond = Term->getCondition(); in handleLoop() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFAdjustOpt.cpp | 225 auto *Cond = dyn_cast<ICmpInst>(BI->getCondition()); in serializeICMPCrossBB() local
226 if (!Cond || B2->getFirstNonPHI() != Cond) in serializeICMPCrossBB()
228 Value *B2Op0 = Cond->getOperand(0); in serializeICMPCrossBB()
229 auto Cond2Op = Cond->getPredicate(); in serializeICMPCrossBB()
235 Cond = dyn_cast<ICmpInst>(BI->getCondition()); in serializeICMPCrossBB()
236 if (!Cond) in serializeICMPCrossBB()
238 Value *B1Op0 = Cond->getOperand(0); in serializeICMPCrossBB()
239 auto Cond1Op = Cond->getPredicate(); in serializeICMPCrossBB()
260 PassThroughInfo Info(Cond, BI, 0); in serializeICMPCrossBB()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsInstrInfo.cpp | 105 Cond.push_back(Inst->getOperand(i)); in AnalyzeCondBr()
122 unsigned Opc = Cond[0].getImm(); in BuildCondBr()
126 for (unsigned i = 1; i < Cond.size(); ++i) { in BuildCondBr()
127 assert((Cond[i].isImm() || Cond[i].isReg()) && in BuildCondBr()
129 MIB.add(Cond[i]); in BuildCondBr()
149 assert((Cond.size() <= 3) && in insertBranch()
154 BuildCondBr(MBB, TBB, DL, Cond); in insertBranch()
161 if (Cond.empty()) in insertBranch()
164 BuildCondBr(MBB, TBB, DL, Cond); in insertBranch()
198 assert( (Cond.size() && Cond.size() <= 3) && in reverseBranchCondition()
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| H A D | MipsInstrInfo.h | 65 SmallVectorImpl<MachineOperand> &Cond,
72 MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
77 reverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const override;
81 SmallVectorImpl<MachineOperand> &Cond,
206 SmallVectorImpl<MachineOperand> &Cond) const;
209 const DebugLoc &DL, ArrayRef<MachineOperand> Cond) const;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86FlagsCopyLowering.cpp | 722 X86::CondCode Cond = X86::getCondFromSETCC(MI); in collectCondsInRegs() local
727 CondRegs[Cond] = MI.getOperand(0).getReg(); in collectCondsInRegs()
740 const DebugLoc &TestLoc, X86::CondCode Cond) { in promoteCondToReg() argument
753 unsigned &CondReg = CondRegs[Cond]; in getCondOrInverseInReg()
780 X86::CondCode Cond = X86::COND_INVALID; in rewriteArithmetic() local
791 Cond = X86::COND_B; // CF == 1 in rewriteArithmetic()
801 unsigned &CondReg = CondRegs[Cond]; in rewriteArithmetic()
827 X86::CondCode Cond = X86::getCondFromCMov(CMovI); in rewriteCMov() local
895 X86::CondCode Cond = X86::getCondFromBranch(JmpI); in rewriteCondJmp() local
928 X86::CondCode Cond = X86::getCondFromSETCC(SetCCI); in rewriteSetCC() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRInstrInfo.cpp | 305 Cond.clear(); in analyzeBranch()
329 if (Cond.empty()) { in analyzeBranch()
370 Cond.push_back(MachineOperand::CreateImm(BranchCode)); in analyzeBranch()
376 assert(Cond.size() == 1); in analyzeBranch()
400 ArrayRef<MachineOperand> Cond, in insertBranch() argument
407 assert((Cond.size() == 1 || Cond.size() == 0) && in insertBranch()
410 if (Cond.empty()) { in insertBranch()
420 AVRCC::CondCodes CC = (AVRCC::CondCodes)Cond[0].getImm(); in insertBranch()
470 SmallVectorImpl<MachineOperand> &Cond) const { in reverseBranchCondition()
471 assert(Cond.size() == 1 && "Invalid AVR branch condition!"); in reverseBranchCondition()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Transforms/Utils/ |
| H A D | BasicBlockUtils.h | 416 Instruction *SplitBlockAndInsertIfThen(Value *Cond, BasicBlock::iterator SplitBefore,
423 inline Instruction *SplitBlockAndInsertIfThen(Value *Cond, Instruction *SplitBefore,
429 return SplitBlockAndInsertIfThen(Cond, SplitBefore->getIterator(),
443 inline Instruction *SplitBlockAndInsertIfElse(Value *Cond, Instruction *SplitBefore,
449 return SplitBlockAndInsertIfElse(Cond, SplitBefore->getIterator(),
470 void SplitBlockAndInsertIfThenElse(Value *Cond,
478 inline void SplitBlockAndInsertIfThenElse(Value *Cond, Instruction *SplitBefore,
485 SplitBlockAndInsertIfThenElse(Cond, SplitBefore->getIterator(), ThenTerm,
516 void SplitBlockAndInsertIfThenElse(Value *Cond,
526 inline void SplitBlockAndInsertIfThenElse(Value *Cond, Instruction *SplitBefore,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 2326 Cond = Cond.getOperand(0); in LowerSELECT()
2355 Cond = Cond.getOperand(0); in LowerSELECT()
2359 if (Cond.getOpcode() == ISD::AND && Cond.hasOneUse()) { in LowerSELECT()
2370 Cond = EmitTest(Cond, M68k::COND_NE, DL, DAG); in LowerSELECT()
2468 Cond = Cond.getOperand(0); in LowerBRCOND()
2479 Cond = Cond.getOperand(0); in LowerBRCOND()
2501 Cond = Cond.getNode()->getOperand(1); in LowerBRCOND()
2569 } else if (Cond.hasOneUse() && isXor1OfSetCC(Cond)) { in LowerBRCOND()
2577 Cond = Cond.getOperand(0).getOperand(1); in LowerBRCOND()
2585 Cond = Cond.getOperand(0); in LowerBRCOND()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/ |
| H A D | AMDGPUAsmUtils.h | 31 bool (*Cond)(T Context) = nullptr; member
40 bool (*Cond)(const MCSubtargetInfo &STI) = nullptr; member
52 return !Cond || Cond(STI); in isSupported()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/ |
| H A D | CSKYInstrInfo.cpp | 41 Cond.push_back(MachineOperand::CreateImm(LastInst.getOpcode())); in parseCondBranch()
42 Cond.push_back(LastInst.getOperand(0)); in parseCondBranch()
51 Cond.clear(); in analyzeBranch()
97 parseCondBranch(*I, TBB, Cond); in analyzeBranch()
104 parseCondBranch(*std::prev(I), TBB, Cond); in analyzeBranch()
162 assert((Cond.size() == 2 || Cond.size() == 0) && in insertBranch()
166 if (Cond.empty()) { in insertBranch()
174 unsigned Opc = Cond[0].getImm(); in insertBranch()
218 SmallVectorImpl<MachineOperand> &Cond) const { in reverseBranchCondition()
219 assert((Cond.size() == 2) && "Invalid branch condition!"); in reverseBranchCondition()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcInstrInfo.cpp | 199 Cond.push_back(MachineOperand::CreateImm(Opc)); in parseCondBranch()
200 Cond.push_back(MachineOperand::CreateImm(CC)); in parseCondBranch()
268 parseCondBranch(LastInst, TBB, Cond); in analyzeBranch()
302 parseCondBranch(SecondLastInst, TBB, Cond); in analyzeBranch()
334 assert((Cond.size() <= 3) && in insertBranch()
337 if (Cond.empty()) { in insertBranch()
346 unsigned Opc = Cond[0].getImm(); in insertBranch()
347 unsigned CC = Cond[1].getImm(); in insertBranch()
349 Register Reg = Cond[2].getReg(); in insertBranch()
395 assert(Cond.size() <= 3); in reverseBranchCondition()
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| /freebsd/contrib/llvm-project/clang/lib/AST/Interp/ |
| H A D | ByteCodeStmtGen.cpp | 412 const Expr *Cond = S->getCond(); in visitWhileStmt() local
420 if (!this->visitBool(Cond)) in visitWhileStmt()
441 const Expr *Cond = S->getCond(); in visitDoStmt() local
457 if (!this->visitBool(Cond)) in visitDoStmt()
471 const Expr *Cond = S->getCond(); in visitForStmt() local
484 if (Cond) { in visitForStmt()
485 if (!this->visitBool(Cond)) in visitForStmt()
510 const Expr *Cond = S->getCond(); in visitCXXForRangeStmt() local
535 if (!this->visitBool(Cond)) in visitCXXForRangeStmt()
581 const Expr *Cond = S->getCond(); in visitSwitchStmt() local
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