Searched refs:DivRemOpc (Results 1 – 3 of 3) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeDAG.cpp | 3704 unsigned DivRemOpc = isSigned ? ISD::SDIVREM : ISD::UDIVREM; in ExpandNode() local
3706 if (TLI.isOperationLegalOrCustom(DivRemOpc, VT)) { in ExpandNode()
3708 Tmp1 = DAG.getNode(DivRemOpc, dl, VTs, Node->getOperand(0), in ExpandNode()
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| H A D | TargetLowering.cpp | 10685 unsigned DivRemOpc = isSigned ? ISD::SDIVREM : ISD::UDIVREM; in expandREM() local
10688 if (isOperationLegalOrCustom(DivRemOpc, VT)) { in expandREM()
10690 Result = DAG.getNode(DivRemOpc, dl, VTs, Dividend, Divisor).getValue(1); in expandREM()
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| H A D | DAGCombiner.cpp | 4628 unsigned DivRemOpc = isSigned ? ISD::SDIVREM : ISD::UDIVREM; in useDivRem() local
4635 if (!TLI.isTypeLegal(VT) && !TLI.isOperationCustom(DivRemOpc, VT)) in useDivRem()
4640 if (!TLI.isOperationLegalOrCustom(DivRemOpc, VT) && in useDivRem()
4667 if ((UserOpc == Opcode || UserOpc == OtherOpcode || UserOpc == DivRemOpc) && in useDivRem()
4673 combined = DAG.getNode(DivRemOpc, SDLoc(Node), VTs, Op0, Op1); in useDivRem()
4674 } else if (UserOpc == DivRemOpc) { in useDivRem()
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