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Searched refs:DstOp (Results 1 – 25 of 26) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DMachineIRBuilder.h67 class DstOp {
225 unsigned getOpcodeForMerge(const DstOp &DstOp, ArrayRef<SrcOp> SrcOps) const;
582 MachineInstrBuilder buildUAddo(const DstOp &Res, const DstOp &CarryOut, in buildUAddo()
588 MachineInstrBuilder buildUSubo(const DstOp &Res, const DstOp &CarryOut, in buildUSubo()
594 MachineInstrBuilder buildSAddo(const DstOp &Res, const DstOp &CarryOut, in buildSAddo()
600 MachineInstrBuilder buildSSubo(const DstOp &Res, const DstOp &CarryOut, in buildSSubo()
619 MachineInstrBuilder buildUAdde(const DstOp &Res, const DstOp &CarryOut, in buildUAdde()
627 MachineInstrBuilder buildUSube(const DstOp &Res, const DstOp &CarryOut, in buildUSube()
635 MachineInstrBuilder buildSAdde(const DstOp &Res, const DstOp &CarryOut, in buildSAdde()
643 MachineInstrBuilder buildSSube(const DstOp &Res, const DstOp &CarryOut, in buildSSube()
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H A DCSEMIRBuilder.h56 void profileDstOp(const DstOp &Op, GISelInstProfileBuilder &B) const;
58 void profileDstOps(ArrayRef<DstOp> Ops, GISelInstProfileBuilder &B) const { in profileDstOps()
59 for (const DstOp &Op : Ops) in profileDstOps()
72 void profileEverything(unsigned Opc, ArrayRef<DstOp> DstOps,
82 MachineInstrBuilder generateCopiesIfRequired(ArrayRef<DstOp> DstOps,
88 bool checkCopyToDefsPossible(ArrayRef<DstOp> DstOps);
95 buildInstr(unsigned Opc, ArrayRef<DstOp> DstOps, ArrayRef<SrcOp> SrcOps,
100 MachineInstrBuilder buildConstant(const DstOp &Res,
105 MachineInstrBuilder buildFConstant(const DstOp &Res,
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DMachineIRBuilder.cpp432 const DstOp &Dst, const SrcOp &BasePtr, in buildLoadFromOffset()
634 MachineIRBuilder::buildMergeLikeInstr(const DstOp &Res, in buildMergeLikeInstr()
645 MachineIRBuilder::buildMergeLikeInstr(const DstOp &Res, in buildMergeLikeInstr()
651 unsigned MachineIRBuilder::getOpcodeForMerge(const DstOp &DstOp, in getOpcodeForMerge() argument
653 if (DstOp.getLLTTy(*getMRI()).isVector()) { in getOpcodeForMerge()
667 SmallVector<DstOp, 8> TmpVec(Res.begin(), Res.end()); in buildUnmerge()
675 SmallVector<DstOp, 8> TmpVec(NumReg, Res); in buildUnmerge()
819 for (DstOp Result : Results) in buildIntrinsic()
933 unsigned Opcode, const DstOp &OldValRes, in buildAtomicRMW()
1235 [&, this](const DstOp &Op) { in buildInstr()
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H A DCSEMIRBuilder.cpp68 void CSEMIRBuilder::profileDstOp(const DstOp &Op, in profileDstOp()
71 case DstOp::DstType::Ty_RC: in profileDstOp()
74 case DstOp::DstType::Ty_Reg: { in profileDstOp()
136 return llvm::all_of(DstOps, [](const DstOp &Op) { in checkCopyToDefsPossible()
137 DstOp::DstType DT = Op.getDstOpKind(); in checkCopyToDefsPossible()
138 return DT == DstOp::DstType::Ty_LLT || DT == DstOp::DstType::Ty_RC; in checkCopyToDefsPossible()
143 CSEMIRBuilder::generateCopiesIfRequired(ArrayRef<DstOp> DstOps, in generateCopiesIfRequired()
148 const DstOp &Op = DstOps[0]; in generateCopiesIfRequired()
149 if (Op.getDstOpKind() == DstOp::DstType::Ty_Reg) in generateCopiesIfRequired()
241 const DstOp &Dst = DstOps[0]; in buildInstr()
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H A DLegalizerHelper.cpp995 DstOp Dest(MRI.createGenericVirtualRegister(MemTy)); in createResetStateLibcall()
4025 static void makeDstOps(SmallVectorImpl<DstOp> &DstOps, LLT Ty, in makeDstOps()
4088 SmallVector<SmallVector<DstOp, 8>, 2> OutputOpsPieces(NumDefs); in fewerElementsVectorMultiEltType()
4119 SmallVector<DstOp, 2> Defs; in fewerElementsVectorMultiEltType()
4153 SmallVector<DstOp, 8> OutputOpsPieces; in fewerElementsVectorPhi()
7692 static MachineInstrBuilder SwapN(unsigned N, DstOp Dst, MachineIRBuilder &B, in SwapN()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrFoldTables.cpp206 Table.push_back({Entry.DstOp, Entry.KeyOp, in addTableEntry()
234 unsigned BcstOp = Reg2Bcst.DstOp; in X86BroadcastFoldTable()
236 unsigned MemOp = Reg2Mem->DstOp; in X86BroadcastFoldTable()
244 unsigned BcstOp = Reg2Bcst.DstOp; in X86BroadcastFoldTable()
246 unsigned MemOp = Reg2Mem->DstOp; in X86BroadcastFoldTable()
255 unsigned BcstOp = Reg2Bcst.DstOp; in X86BroadcastFoldTable()
257 unsigned MemOp = Reg2Mem->DstOp; in X86BroadcastFoldTable()
265 unsigned BcstOp = Reg2Bcst.DstOp; in X86BroadcastFoldTable()
267 unsigned MemOp = Reg2Mem->DstOp; in X86BroadcastFoldTable()
276 unsigned BcstOp = Reg2Bcst.DstOp; in X86BroadcastFoldTable()
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H A DX86InstrFoldTables.h25 unsigned DstOp; member
H A DX86MCInstLower.cpp1406 const MachineOperand &DstOp = MI->getOperand(0); in getShuffleComment() local
1410 StringRef DstName = DstOp.isReg() ? GetRegisterName(DstOp.getReg()) : "mem"; in getShuffleComment()
1549 const MachineOperand &DstOp = MI->getOperand(0); in printZeroUpperMove() local
1550 CS << X86ATTInstPrinter::getRegisterName(DstOp.getReg()) << " = "; in printZeroUpperMove()
1574 const MachineOperand &DstOp = MI->getOperand(0); in printBroadcast() local
1575 CS << X86ATTInstPrinter::getRegisterName(DstOp.getReg()) << " = "; in printBroadcast()
1829 const MachineOperand &DstOp = MI->getOperand(0); in addConstantComments() local
1830 CS << X86ATTInstPrinter::getRegisterName(DstOp.getReg()) << " = "; in addConstantComments()
H A DX86FixupVectorConstants.cpp355 OpBcst32 = Mem2Bcst->DstOp; in processInstruction()
362 OpBcst64 = Mem2Bcst->DstOp; in processInstruction()
H A DX86InstrInfo.cpp7355 unsigned Opcode = I->DstOp; in foldMemoryOperandImpl()
8278 unsigned Opc = I->DstOp; in unfoldMemoryOperand()
8428 unsigned Opc = I->DstOp; in unfoldMemoryOperand()
8570 return I->DstOp; in getOpcodeAfterMemoryUnfold()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonRDFOpt.cpp123 const MachineOperand &DstOp = MI->getOperand(0); in INITIALIZE_PASS_DEPENDENCY() local
126 assert(DstOp.getSubReg() == 0 && "Unexpected subregister"); in INITIALIZE_PASS_DEPENDENCY()
127 mapRegs(DFG.makeRegRef(DstOp.getReg(), Hexagon::isub_hi), in INITIALIZE_PASS_DEPENDENCY()
129 mapRegs(DFG.makeRegRef(DstOp.getReg(), Hexagon::isub_lo), in INITIALIZE_PASS_DEPENDENCY()
140 const MachineOperand &DstOp = MI->getOperand(0); in INITIALIZE_PASS_DEPENDENCY() local
142 mapRegs(DFG.makeRegRef(DstOp.getReg(), DstOp.getSubReg()), in INITIALIZE_PASS_DEPENDENCY()
/freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVInstrInfo.cpp239 auto DstOp = I->getOperand(0); in copyPhysReg() local
241 assert(DstOp.isReg() && SrcOp.isReg() && in copyPhysReg()
244 MRI.replaceRegWith(DstOp.getReg(), SrcOp.getReg()); in copyPhysReg()
/freebsd/contrib/llvm-project/llvm/lib/Linker/
H A DIRMover.cpp1295 MDNode *DstOp; in linkModuleFlagsMetadata() local
1297 std::tie(DstOp, DstIndex) = Flags.lookup(ID); in linkModuleFlagsMetadata()
1312 if (!DstOp) { in linkModuleFlagsMetadata()
1324 mdconst::extract<ConstantInt>(DstOp->getOperand(0)); in linkModuleFlagsMetadata()
1336 SrcOp->getOperand(2) != DstOp->getOperand(2)) in linkModuleFlagsMetadata()
1374 Metadata *FlagOps[] = {DstOp->getOperand(0), ID, New}; in linkModuleFlagsMetadata()
1385 SrcOp->getOperand(2) != DstOp->getOperand(2)) { in linkModuleFlagsMetadata()
1391 << *DstOp->getOperand(2) << "' from " << DstM.getModuleIdentifier() in linkModuleFlagsMetadata()
1399 mdconst::extract<ConstantInt>(DstOp->getOperand(2)); in linkModuleFlagsMetadata()
1418 mdconst::extract<ConstantInt>(DstOp->getOperand(2)); in linkModuleFlagsMetadata()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600ExpandSpecialInstrs.cpp88 MachineOperand &DstOp = MI.getOperand(DstIdx); in runOnMachineFunction() local
90 DstOp.getReg(), R600::OQAP); in runOnMachineFunction()
91 DstOp.setReg(R600::OQAP); in runOnMachineFunction()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SelectionDAGInfo.cpp54 auto *DstOp = in EmitMOPS() local
64 DAG.setNodeMemRefs(Node, {DstOp}); in EmitMOPS()
74 DAG.setNodeMemRefs(Node, {DstOp, SrcOp}); in EmitMOPS()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DInlineSpiller.cpp260 const MachineOperand &DstOp = MI.getOperand(0); in isCopyOf() local
264 if (DstOp.getSubReg() != SrcOp.getSubReg()) in isCopyOf()
266 if (DstOp.getReg() == Reg) in isCopyOf()
269 return DstOp.getReg(); in isCopyOf()
290 const MachineOperand &DstOp = *CopyInst->Destination; in isCopyOfBundle() local
292 if (DstOp.getReg() == Reg) { in isCopyOfBundle()
299 SnipReg = DstOp.getReg(); in isCopyOfBundle()
300 else if (SnipReg != DstOp.getReg()) in isCopyOfBundle()
H A DMachineVerifier.cpp1639 const MachineOperand &DstOp = MI->getOperand(0); in verifyPreISelGenericInstruction() local
1643 if (!DstOp.isReg() || !MRI->getType(DstOp.getReg()).isPointer()) { in verifyPreISelGenericInstruction()
1941 const MachineOperand &DstOp = MI->getOperand(0); in visitMachineInstrBefore() local
1944 const Register DstReg = DstOp.getReg(); in visitMachineInstrBefore()
1994 if (!DstOp.getSubReg() && !SrcOp.getSubReg()) { in visitMachineInstrBefore()
H A DMachineScheduler.cpp2050 const MachineOperand &DstOp = Copy->getOperand(0); in constrainLocalCopy() local
2051 Register DstReg = DstOp.getReg(); in constrainLocalCopy()
2052 if (!DstReg.isVirtual() || DstOp.isDead()) in constrainLocalCopy()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DMIRYamlMapping.h521 unsigned DstOp;
525 return std::tie(SrcInst, SrcOp, DstInst, DstOp) ==
526 std::tie(Other.SrcInst, Other.SrcOp, Other.DstInst, Other.DstOp);
535 YamlIO.mapRequired("dstop", Sub.DstOp);
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/
H A DPPCCallLowering.cpp158 const DstOp &Res, Register Addr) { in assignValueToAddress()
/freebsd/contrib/llvm-project/llvm/utils/TableGen/
H A DGlobalISelEmitter.cpp1478 Record *DstOp = Dst->getOperator(); in createInstructionRenderer() local
1479 if (!DstOp->isSubClassOf("Instruction")) { in createInstructionRenderer()
1480 if (DstOp->isSubClassOf("ValueType")) in createInstructionRenderer()
1485 CodeGenInstruction *DstI = &Target.getInstruction(DstOp); in createInstructionRenderer()
1989 Record *DstOp = Dst->getOperator(); in runOnPattern() local
1990 if (!DstOp->isSubClassOf("Instruction")) in runOnPattern()
1993 auto &DstI = Target.getInstruction(DstOp); in runOnPattern()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMCallLowering.cpp276 MachineInstrBuilder buildLoad(const DstOp &Res, Register Addr, LLT MemTy, in buildLoad()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/MIRParser/
H A DMIRParser.cpp453 {Sub.DstInst, Sub.DstOp}, Sub.Subreg); in setupDebugValueTracking()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/LiveDebugValues/
H A DInstrRefBasedImpl.cpp897 ResolvedDbgOp DstOp(Dst); in transferMlocs() local
904 ActiveVLocIt->second.Ops.end(), SrcOp, DstOp); in transferMlocs()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64InstructionSelector.cpp259 emitInstr(unsigned Opcode, std::initializer_list<llvm::DstOp> DstOps,
4403 unsigned Opcode, std::initializer_list<llvm::DstOp> DstOps, in emitInstr()
6071 {Narrow ? DstOp(&AArch64::FPR128RegClass) in selectVectorLoadLaneIntrinsic()
6072 : DstOp(I.getOperand(Idx).getReg())}, in selectVectorLoadLaneIntrinsic()

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