Searched refs:Dummy1 (Results 1 – 4 of 4) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInsertHardClauses.cpp | 213 int64_t Dummy1; in runOnMachineFunction() local
218 if (!SII->getMemOperandsWithOffsetWidth(MI, BaseOps, Dummy1, Dummy2, in runOnMachineFunction()
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| H A D | SIInstrInfo.cpp | 3650 unsigned Dummy0, Dummy1; in checkInstOffsetsDoNotOverlap() local
3655 Dummy1, &RI)) in checkInstOffsetsDoNotOverlap()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 3491 int64_t Dummy1, Dummy2; in getMemOperandWithOffsetWidth() local
3494 if (!getMemOpInfo(LdSt.getOpcode(), Scale, Width, Dummy1, Dummy2)) in getMemOperandWithOffsetWidth()
8947 int64_t Dummy1, Dummy2; in fixupPostOutline() local
8951 getMemOpInfo(MI.getOpcode(), Scale, Width, Dummy1, Dummy2); in fixupPostOutline()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 5108 int Dummy1, Dummy2; in isShuffleMaskLegal() local
5109 return (isElementRotate(Dummy1, Dummy2, M) > 0) || in isShuffleMaskLegal()
5110 isInterleaveShuffle(M, SVT, Dummy1, Dummy2, Subtarget); in isShuffleMaskLegal()
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