Searched refs:ExtVecVT (Results 1 – 3 of 3) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 9380 MVT ExtVecVT = VecVT.changeVectorElementType(MVT::i8); in lowerINSERT_SUBVECTOR() local
9382 Vec = DAG.getNode(ISD::ZERO_EXTEND, DL, ExtVecVT, Vec); in lowerINSERT_SUBVECTOR()
9384 Vec = DAG.getNode(ISD::INSERT_SUBVECTOR, DL, ExtVecVT, Vec, SubVec, in lowerINSERT_SUBVECTOR()
9386 SDValue SplatZero = DAG.getConstant(0, DL, ExtVecVT); in lowerINSERT_SUBVECTOR()
9558 MVT ExtVecVT = VecVT.changeVectorElementType(MVT::i8); in lowerEXTRACT_SUBVECTOR() local
9560 Vec = DAG.getNode(ISD::ZERO_EXTEND, DL, ExtVecVT, Vec); in lowerEXTRACT_SUBVECTOR()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 13377 EVT ExtVecVT = in PerformVQDMULHCombine() local
13381 DAG.getNode(ISD::ANY_EXTEND, DL, ExtVecVT, Ext0.getOperand(0)); in PerformVQDMULHCombine()
13383 DAG.getNode(ISD::ANY_EXTEND, DL, ExtVecVT, Ext1.getOperand(0)); in PerformVQDMULHCombine()
13387 SDValue Trunc = DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, ExtVecVT, VQDMULH); in PerformVQDMULHCombine()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 17818 MVT ExtVecVT = MVT::getVectorVT(ExtEltVT, NumElts); in ExtractBitFromMaskVector() local
17819 SDValue Ext = DAG.getNode(ISD::SIGN_EXTEND, dl, ExtVecVT, Vec); in ExtractBitFromMaskVector()
18043 MVT ExtVecVT = MVT::getVectorVT(ExtEltVT, NumElts); in InsertBitToMaskVector() local
18044 SDValue ExtOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, ExtVecVT, in InsertBitToMaskVector()
18045 DAG.getNode(ISD::SIGN_EXTEND, dl, ExtVecVT, Vec), in InsertBitToMaskVector()
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