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Searched refs:IntVT (Results 1 – 22 of 22) sorted by relevance

/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DValueTypes.h411 for (unsigned IntVT = MVT::FIRST_INTEGER_VALUETYPE; in getHalfSizedIntegerVT() local
412 IntVT <= MVT::LAST_INTEGER_VALUETYPE; ++IntVT) { in getHalfSizedIntegerVT()
413 EVT HalfVT = EVT((MVT::SimpleValueType)IntVT); in getHalfSizedIntegerVT()
H A DTargetLowering.h2352 virtual bool shouldUseStrictFP_TO_INT(EVT FpVT, EVT IntVT, in shouldUseStrictFP_TO_INT() argument
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DFunctionLoweringInfo.cpp430 EVT IntVT = ValueVTs[0]; in ComputePHILiveOutRegInfo() local
432 if (TLI->getNumRegisters(PN->getContext(), IntVT) != 1) in ComputePHILiveOutRegInfo()
434 IntVT = TLI->getTypeToTransformTo(PN->getContext(), IntVT); in ComputePHILiveOutRegInfo()
435 unsigned BitWidth = IntVT.getSizeInBits(); in ComputePHILiveOutRegInfo()
H A DFastISel.cpp301 EVT IntVT = TLI.getPointerTy(DL); in materializeConstant() local
302 uint32_t IntBitWidth = IntVT.getSizeInBits(); in materializeConstant()
310 Reg = fastEmit_r(IntVT.getSimpleVT(), VT, ISD::SINT_TO_FP, in materializeConstant()
1697 EVT IntVT = EVT::getIntegerVT(I->getContext(), VT.getSizeInBits()); in selectFNeg() local
1698 if (!TLI.isTypeLegal(IntVT)) in selectFNeg()
1701 Register IntReg = fastEmit_r(VT.getSimpleVT(), IntVT.getSimpleVT(), in selectFNeg()
1707 IntVT.getSimpleVT(), ISD::XOR, IntReg, in selectFNeg()
1708 UINT64_C(1) << (VT.getSizeInBits() - 1), IntVT.getSimpleVT()); in selectFNeg()
1712 ResultReg = fastEmit_r(IntVT.getSimpleVT(), VT.getSimpleVT(), ISD::BITCAST, in selectFNeg()
H A DTargetLowering.cpp8052 EVT IntVT = SrcVT.changeTypeToInteger(); in expandFP_TO_SINT() local
8057 SDValue Bias = DAG.getConstant(127, dl, IntVT); in expandFP_TO_SINT()
8065 ISD::SRL, dl, IntVT, DAG.getNode(ISD::AND, dl, IntVT, Bits, ExponentMask), in expandFP_TO_SINT()
8069 SDValue Sign = DAG.getNode(ISD::SRA, dl, IntVT, in expandFP_TO_SINT()
8074 SDValue R = DAG.getNode(ISD::OR, dl, IntVT, in expandFP_TO_SINT()
8433 IntVT = EVT::getVectorVT(*DAG.getContext(), IntVT, in expandIS_FPCLASS()
8435 SDValue OpAsInt = DAG.getBitcast(IntVT, Op); in expandIS_FPCLASS()
8453 SDValue ZeroV = DAG.getConstant(0, DL, IntVT); in expandIS_FPCLASS()
8454 SDValue InfV = DAG.getConstant(Inf, DL, IntVT); in expandIS_FPCLASS()
8536 DAG.getNode(ISD::SUB, DL, IntVT, V, DAG.getConstant(1, DL, IntVT)); in expandIS_FPCLASS()
[all …]
H A DLegalizeDAG.cpp1630 EVT IntVT = SignAsInt.IntValue.getValueType(); in ExpandFCOPYSIGN() local
1631 SDValue SignMask = DAG.getConstant(SignAsInt.SignMask, DL, IntVT); in ExpandFCOPYSIGN()
1641 SDValue Cond = DAG.getSetCC(DL, getSetCCResultType(IntVT), SignBit, in ExpandFCOPYSIGN()
1656 EVT ShiftVT = IntVT; in ExpandFCOPYSIGN()
1684 EVT IntVT = SignAsInt.IntValue.getValueType(); in ExpandFNEG() local
1687 SDValue SignMask = DAG.getConstant(SignAsInt.SignMask, DL, IntVT); in ExpandFNEG()
1689 DAG.getNode(ISD::XOR, DL, IntVT, SignAsInt.IntValue, SignMask); in ExpandFNEG()
1709 EVT IntVT = ValueAsInt.IntValue.getValueType(); in ExpandFABS() local
4720 for (unsigned IntVT = MVT::FIRST_INTEGER_VALUETYPE; in ConvertNodeToLibcall() local
4722 ++IntVT) { in ConvertNodeToLibcall()
[all …]
H A DDAGCombiner.cpp5547 EVT IntVT = N0.getValueType().getScalarType(); in isSaturatingMinMax() local
5554 if (IntVT.getSizeInBits() >= MinBitWidth) { in isSaturatingMinMax()
15505 SrcEltVT = IntVT; in ConstantFoldBITCASTofBUILD_VECTOR()
19699 if (!TLI.isOperationLegal(ISD::LOAD, IntVT) || in TransformFPLoadStorePair()
19700 !TLI.isOperationLegal(ISD::STORE, IntVT) || in TransformFPLoadStorePair()
25662 EVT IntVT = VT.changeVectorElementTypeToInteger(); in visitVECTOR_SHUFFLE() local
25679 if (TLI.isVectorClearMaskLegal(ClearMask, IntVT)) in visitVECTOR_SHUFFLE()
25681 VT, DAG.getVectorShuffle(IntVT, DL, DAG.getBitcast(IntVT, N0), in visitVECTOR_SHUFFLE()
25686 VT, DAG.getNode(ISD::AND, DL, IntVT, DAG.getBitcast(IntVT, N0), in visitVECTOR_SHUFFLE()
27179 EVT IntVT = Int.getValueType(); in foldSignChangeInBitcast() local
[all …]
H A DLegalizeFloatTypes.cpp1034 for (unsigned IntVT = MVT::FIRST_INTEGER_VALUETYPE; in findFPToIntLibcall() local
1035 IntVT <= MVT::LAST_INTEGER_VALUETYPE && LC == RTLIB::UNKNOWN_LIBCALL; in findFPToIntLibcall()
1036 ++IntVT) { in findFPToIntLibcall()
1037 Promoted = (MVT::SimpleValueType)IntVT; in findFPToIntLibcall()
H A DSelectionDAG.cpp7294 EVT IntVT = VT.getScalarType(); in getMemsetValue() local
7295 if (!IntVT.isInteger()) in getMemsetValue()
7296 IntVT = EVT::getIntegerVT(*DAG.getContext(), IntVT.getSizeInBits()); in getMemsetValue()
7298 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, IntVT, Value); in getMemsetValue()
7303 Value = DAG.getNode(ISD::MUL, dl, IntVT, Value, in getMemsetValue()
7304 DAG.getConstant(Magic, dl, IntVT)); in getMemsetValue()
H A DSelectionDAGBuilder.cpp247 EVT IntVT = EVT::getIntegerVT(*DAG.getContext(), ValueVT.getSizeInBits()); in getCopyFromParts() local
248 Val = getCopyFromParts(DAG, DL, Parts, NumParts, PartVT, IntVT, V, in getCopyFromParts()
/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEISelLowering.cpp162 for (MVT IntVT : {MVT::i32, MVT::i64}) { in initSPUActions()
164 setOperationAction(ISD::UREM, IntVT, Expand); in initSPUActions()
165 setOperationAction(ISD::SREM, IntVT, Expand); in initSPUActions()
182 setOperationAction(ISD::CTTZ, IntVT, Expand); in initSPUActions()
195 setOperationAction(ISD::CTLZ, IntVT, Act); in initSPUActions()
197 setOperationAction(ISD::CTPOP, IntVT, Act); in initSPUActions()
201 setOperationAction(ISD::AND, IntVT, Act); in initSPUActions()
202 setOperationAction(ISD::OR, IntVT, Act); in initSPUActions()
203 setOperationAction(ISD::XOR, IntVT, Act); in initSPUActions()
206 setOperationAction(ISD::SMAX, IntVT, Legal); in initSPUActions()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.cpp1993 EVT IntVT = MemVT.changeTypeToInteger(); in lowerKernargMemParameter() local
2886 EVT IntVT = MemVT.changeTypeToInteger(); in LowerFormalArguments() local
5739 EVT IntVT = LoadVT.changeTypeToInteger(); in lowerIntrinsicLoad() local
6820 MVT IntVT = MVT::getIntegerVT(VecSize); in lowerINSERT_VECTOR_ELT() local
6827 SDValue BFM = DAG.getNode(ISD::SHL, SL, IntVT, in lowerINSERT_VECTOR_ELT()
6831 SDValue ExtVal = DAG.getNode(ISD::BITCAST, SL, IntVT, in lowerINSERT_VECTOR_ELT()
6839 SDValue RHS = DAG.getNode(ISD::AND, SL, IntVT, in lowerINSERT_VECTOR_ELT()
6922 MVT IntVT = MVT::getIntegerVT(VecSize); in lowerEXTRACT_VECTOR_ELT() local
6929 Vec = DAG.getAnyExtOrTrunc(Src, SL, IntVT); in lowerEXTRACT_VECTOR_ELT()
8515 EVT IntVT = VT.changeTypeToInteger(); in LowerINTRINSIC_W_CHAIN() local
[all …]
H A DAMDGPUISelLowering.cpp1870 MVT IntVT = MVT::i32; in LowerDIVREM24() local
1890 SDValue jq = DAG.getConstant(1, DL, IntVT); in LowerDIVREM24()
1941 SDValue iq = DAG.getNode(ToInt, DL, IntVT, fq); in LowerDIVREM24()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp808 MVT IntVT = MVT::getIntegerVT(VT.getFixedSizeInBits()); in initActions() local
809 if (IntVT.isValid()) { in initActions()
811 AddPromotedToType(ISD::ATOMIC_SWAP, VT, IntVT); in initActions()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp2921 MVT IntVT = ContainerVT.changeVectorElementTypeToInteger(); in lowerVectorFTRUNC_FCEIL_FFLOOR_FROUND() local
5183 EVT IntVT = FloatVT.changeVectorElementTypeToInteger(); in lowerCTLZ_CTTZ_ZERO_UNDEF() local
5184 SDValue Bitcast = DAG.getBitcast(IntVT, FloatVal); in lowerCTLZ_CTTZ_ZERO_UNDEF()
5190 Exp = DAG.getNode(ISD::VP_LSHR, DL, IntVT, Bitcast, in lowerCTLZ_CTTZ_ZERO_UNDEF()
5194 Exp = DAG.getNode(ISD::SRL, DL, IntVT, Bitcast, in lowerCTLZ_CTTZ_ZERO_UNDEF()
5195 DAG.getConstant(ShiftAmt, DL, IntVT)); in lowerCTLZ_CTTZ_ZERO_UNDEF()
5196 if (IntVT.bitsLT(VT)) in lowerCTLZ_CTTZ_ZERO_UNDEF()
5198 else if (IntVT.bitsGT(VT)) in lowerCTLZ_CTTZ_ZERO_UNDEF()
9900 MVT IntVT = VecVT.changeVectorElementTypeToInteger(); in lowerVECTOR_REVERSE() local
9944 SplatVL = DAG.getSplatVector(IntVT, DL, VLMinus1); in lowerVECTOR_REVERSE()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp18989 IntVT != MVT::i32) in lowerFPToIntToFP()
18993 unsigned IntSize = IntVT.getSizeInBits(); in lowerFPToIntToFP()
22148 if (IntVT != MVT::i64) in LowerVectorAllEqual()
22614 EVT IntVT = IntPow2.getValueType(); in optimizeFMulOrFDivAsShiftAddBitcast() local
42643 EVT IntVT = in combineBitcastvxi1() local
42645 V = DAG.getZExtOrTrunc(V, DL, IntVT); in combineBitcastvxi1()
47799 IntVT = MVT::i32; in combineCompareEqual()
50004 if (TLI.isTypeLegal(IntVT)) { in combineLoad()
53501 EVT IntVT = BV->getValueType(0); in combineVectorCompareAndMaskUnaryOp() local
55243 if (TLI.isTypeLegal(IntVT)) in combineCONCAT_VECTORS()
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H A DX86ISelLoweringCall.cpp1629 MVT IntVT = is64Bit() ? MVT::i64 : MVT::i32; in forwardMustTailParameters() local
1630 RegParmTypes.push_back(IntVT); in forwardMustTailParameters()
H A DX86ISelDAGToDAG.cpp1268 EVT IntVT = EVT(VecVT).changeVectorElementTypeToInteger(); in PreprocessISelDAG() local
1269 Op0 = CurDAG->getNode(ISD::BITCAST, dl, IntVT, Op0); in PreprocessISelDAG()
1270 Op1 = CurDAG->getNode(ISD::BITCAST, dl, IntVT, Op1); in PreprocessISelDAG()
1279 Res = CurDAG->getNode(Opc, dl, IntVT, Op0, Op1); in PreprocessISelDAG()
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp5923 MVT IntVT = MVT::getIntegerVT(VT.getScalarSizeInBits()); in lowerINSERT_VECTOR_ELT() local
5924 MVT IntVecVT = MVT::getVectorVT(IntVT, VT.getVectorNumElements()); in lowerINSERT_VECTOR_ELT()
5927 DAG.getNode(ISD::BITCAST, DL, IntVT, Op1), Op2); in lowerINSERT_VECTOR_ELT()
5950 MVT IntVT = MVT::getIntegerVT(VT.getSizeInBits()); in lowerEXTRACT_VECTOR_ELT() local
5951 MVT IntVecVT = MVT::getVectorVT(IntVT, VecVT.getVectorNumElements()); in lowerEXTRACT_VECTOR_ELT()
5952 SDValue Res = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, IntVT, in lowerEXTRACT_VECTOR_ELT()
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kISelLowering.cpp1023 MVT IntVT = MVT::i32; in LowerFormalArguments() local
1024 RegParmTypes.push_back(IntVT); in LowerFormalArguments()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp4173 EVT IntVT = SrcVT.changeVectorElementTypeToInteger(); in LowerVectorFP_TO_INT_SAT() local
4174 SDValue NativeCvt = DAG.getNode(Op.getOpcode(), DL, IntVT, SrcVal, in LowerVectorFP_TO_INT_SAT()
4180 SDValue Min = DAG.getNode(ISD::SMIN, DL, IntVT, NativeCvt, MinC); in LowerVectorFP_TO_INT_SAT()
4183 Sat = DAG.getNode(ISD::SMAX, DL, IntVT, Min, MaxC); in LowerVectorFP_TO_INT_SAT()
4186 APInt::getAllOnes(SatWidth).zext(SrcElementWidth), DL, IntVT); in LowerVectorFP_TO_INT_SAT()
4187 Sat = DAG.getNode(ISD::UMIN, DL, IntVT, NativeCvt, MinC); in LowerVectorFP_TO_INT_SAT()
9023 EVT IntVT = VT.changeTypeToInteger(); in LowerFCOPYSIGN() local
9034 IntVT = in LowerFCOPYSIGN()
9069 VecVT = IntVT; in LowerFCOPYSIGN()
17272 EVT IntVT = BV->getValueType(0); in performVectorCompareAndMaskUnaryOpCombine() local
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp7766 EVT IntVT = Op.getValueType(); in LowerGET_DYNAMIC_AREA_OFFSET() local
7773 SDVTList VTs = DAG.getVTList(IntVT); in LowerGET_DYNAMIC_AREA_OFFSET()