Searched refs:NewBaseReg (Results 1 – 5 of 5) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LoadStoreOpt.cpp | 774 Register NewBaseReg; in mergeTruncStore() local
778 m_GPtrAdd(m_Reg(NewBaseReg), m_ICst(MemOffset)))) { in mergeTruncStore()
779 NewBaseReg = NewStore->getPointerReg(); in mergeTruncStore()
782 if (BaseReg != NewBaseReg) in mergeTruncStore()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCOptAddrMode.cpp | 265 unsigned NewBaseReg = Add.getOperand(0).getReg(); in tryToCombine() local
266 changeToAddrMode(Ldst, NewOpcode, NewBaseReg, Add.getOperand(2)); in tryToCombine()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMLoadStoreOptimizer.cpp | 3013 static void AdjustBaseAndOffset(MachineInstr *MI, Register NewBaseReg, in AdjustBaseAndOffset() argument
3018 MI->getOperand(BaseOp).setReg(NewBaseReg); in AdjustBaseAndOffset()
3024 MRI.constrainRegClass(NewBaseReg, TRC); in AdjustBaseAndOffset()
3174 Register NewBaseReg; in DistributeIncrements() local
3219 NewBaseReg = PrePostInc->getOperand(0).getReg(); in DistributeIncrements()
3260 NewBaseReg = Increment->getOperand(0).getReg(); in DistributeIncrements()
3262 createPostIncLoadStore(BaseAccess, IncrementOffset, NewBaseReg, TII, TRI); in DistributeIncrements()
3271 AdjustBaseAndOffset(Use, NewBaseReg, IncrementOffset, TII, TRI); in DistributeIncrements()
3277 for (MachineOperand &Op : MRI->use_nodbg_operands(NewBaseReg)) in DistributeIncrements()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MachinePipeliner.cpp | 3291 unsigned NewBaseReg = 0; in fixupRegisterOverlaps() local
3308 NewMI->getOperand(BasePos).setReg(NewBaseReg); in fixupRegisterOverlaps()
3318 NewBaseReg = 0; in fixupRegisterOverlaps()
3328 NewBaseReg = MI->getOperand(i).getReg(); in fixupRegisterOverlaps()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | LoopStrengthReduce.cpp | 4204 const SCEV *NewBaseReg = in GenerateTruncates() local
4206 if (!NewBaseReg || NewBaseReg->isZero()) { in GenerateTruncates()
4210 BaseReg = NewBaseReg; in GenerateTruncates()
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