Searched refs:Op1Lo (Results 1 – 3 of 3) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorTypes.cpp | 1298 SDValue Op1Lo, Op1Hi; in SplitVecRes_TernaryOp() local
1299 GetSplitVector(N->getOperand(1), Op1Lo, Op1Hi); in SplitVecRes_TernaryOp()
1307 Lo = DAG.getNode(Opcode, dl, Op0Lo.getValueType(), Op0Lo, Op1Lo, Op2Lo, Flags); in SplitVecRes_TernaryOp()
1323 {Op0Lo, Op1Lo, Op2Lo, MaskLo, EVLLo}, Flags); in SplitVecRes_TernaryOp()
2917 SDValue Op0Lo, Op0Hi, Op1Lo, Op1Hi; in SplitVecRes_VECTOR_DEINTERLEAVE() local
2919 GetSplitVector(N->getOperand(1), Op1Lo, Op1Hi); in SplitVecRes_VECTOR_DEINTERLEAVE()
2925 DAG.getVTList(VT, VT), Op1Lo, Op1Hi); in SplitVecRes_VECTOR_DEINTERLEAVE()
2932 SDValue Op0Lo, Op0Hi, Op1Lo, Op1Hi; in SplitVecRes_VECTOR_INTERLEAVE() local
2934 GetSplitVector(N->getOperand(1), Op1Lo, Op1Hi); in SplitVecRes_VECTOR_INTERLEAVE()
2938 DAG.getVTList(VT, VT), Op0Lo, Op1Lo), in SplitVecRes_VECTOR_INTERLEAVE()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 9702 auto [Op1Lo, Op1Hi] = DAG.SplitVectorOperand(Op.getNode(), 1); in lowerVECTOR_DEINTERLEAVE()
9708 DAG.getVTList(SplitVT, SplitVT), Op1Lo, Op1Hi); in lowerVECTOR_DEINTERLEAVE()
9780 auto [Op1Lo, Op1Hi] = DAG.SplitVectorOperand(Op.getNode(), 1); in lowerVECTOR_INTERLEAVE()
9784 DAG.getVTList(SplitVT, SplitVT), Op0Lo, Op1Lo); in lowerVECTOR_INTERLEAVE()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 13738 SDValue Op1Lo = DAG.getNode(UnpkLo, dl, WidenedVT, Op.getOperand(1)); in LowerDIV() local
13741 SDValue ResultLo = DAG.getNode(Op.getOpcode(), dl, WidenedVT, Op0Lo, Op1Lo); in LowerDIV()
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