| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyInstrInfo.cpp | 76 MachineInstr &MI, bool NewMI, unsigned OpIdx1, unsigned OpIdx2) const { in commuteInstructionImpl() argument
80 if (MFI.isVRegStackified(MI.getOperand(OpIdx1).getReg()) || in commuteInstructionImpl()
85 return TargetInstrInfo::commuteInstructionImpl(MI, NewMI, OpIdx1, OpIdx2); in commuteInstructionImpl()
|
| H A D | WebAssemblyInstrInfo.h | 52 unsigned OpIdx1,
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86EncodingOptimization.cpp | 23 unsigned OpIdx1, OpIdx2; in optimizeInstFromVEX3ToVEX2() local
29 OpIdx1 = IDX1; \ in optimizeInstFromVEX3ToVEX2()
47 OpIdx1 = 1; in optimizeInstFromVEX3ToVEX2()
64 OpIdx1 = 1; in optimizeInstFromVEX3ToVEX2()
92 if (X86II::isX86_64ExtendedReg(MI.getOperand(OpIdx1).getReg()) || in optimizeInstFromVEX3ToVEX2()
98 std::swap(MI.getOperand(OpIdx1), MI.getOperand(OpIdx2)); in optimizeInstFromVEX3ToVEX2()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | Thumb2InstrInfo.h | 68 unsigned OpIdx1,
|
| H A D | Thumb2InstrInfo.cpp | 275 unsigned OpIdx1, in commuteInstructionImpl() argument
286 return ARMBaseInstrInfo::commuteInstructionImpl(MI, NewMI, OpIdx1, OpIdx2); in commuteInstructionImpl()
|
| H A D | ARMBaseInstrInfo.h | 102 unsigned OpIdx1,
|
| H A D | ARMBaseInstrInfo.cpp | 2257 unsigned OpIdx1, in commuteInstructionImpl() argument
2269 TargetInstrInfo::commuteInstructionImpl(MI, NewMI, OpIdx1, OpIdx2); in commuteInstructionImpl()
2278 return TargetInstrInfo::commuteInstructionImpl(MI, NewMI, OpIdx1, OpIdx2); in commuteInstructionImpl()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfo.cpp | 2801 unsigned OpIdx1, in commuteInstructionImpl() argument
2815 return TargetInstrInfo::commuteInstructionImpl(WorkingMI, false, OpIdx1, in commuteInstructionImpl()
2826 OpIdx1, OpIdx2); in commuteInstructionImpl()
2848 assert((OpIdx1 == 1 || OpIdx2 == 1) && "Unexpected opcode index"); in commuteInstructionImpl()
2849 assert((OpIdx1 == 3 || OpIdx2 == 3) && "Unexpected opcode index"); in commuteInstructionImpl()
2877 OpIdx1, OpIdx2); in commuteInstructionImpl()
2885 assert((OpIdx1 == 1 || OpIdx2 == 1) && "Unexpected opcode index"); in commuteInstructionImpl()
2888 if (OpIdx1 == 3 || OpIdx2 == 3) { in commuteInstructionImpl()
2904 OpIdx1, OpIdx2); in commuteInstructionImpl()
2911 return TargetInstrInfo::commuteInstructionImpl(MI, NewMI, OpIdx1, OpIdx2); in commuteInstructionImpl()
|
| H A D | RISCVInstrInfo.h | 218 unsigned OpIdx1,
|
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetInstrInfo.cpp | 250 unsigned OpIdx1, in commuteInstruction() argument
255 if ((OpIdx1 == CommuteAnyOperandIndex || OpIdx2 == CommuteAnyOperandIndex) && in commuteInstruction()
256 !findCommutedOpIndices(MI, OpIdx1, OpIdx2)) { in commuteInstruction()
261 return commuteInstructionImpl(MI, NewMI, OpIdx1, OpIdx2); in commuteInstruction()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUPromoteAlloca.cpp | 96 int OpIdx1) const;
1037 int OpIdx1) const { in binaryOpIsDerivedFromSameAlloca()
1041 OtherOp = Inst->getOperand(OpIdx1); in binaryOpIsDerivedFromSameAlloca()
|
| H A D | SIInstrInfo.h | 194 unsigned OpIdx1) const override;
|
| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetInstrInfo.h | 185 unsigned OpIdx1,
468 unsigned OpIdx1 = CommuteAnyOperandIndex,
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.h | 248 unsigned OpIdx1,
|
| H A D | PPCInstrInfo.cpp | 1117 unsigned OpIdx1, in commuteInstructionImpl() argument
1123 return TargetInstrInfo::commuteInstructionImpl(MI, NewMI, OpIdx1, OpIdx2); in commuteInstructionImpl()
1141 assert(((OpIdx1 == 1 && OpIdx2 == 2) || (OpIdx1 == 2 && OpIdx2 == 1)) && in commuteInstructionImpl()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrInfo.cpp | 292 unsigned OpIdx1, in commuteInstructionImpl() argument
315 OpIdx1, OpIdx2); in commuteInstructionImpl()
318 return TargetInstrInfo::commuteInstructionImpl(MI, NewMI, OpIdx1, OpIdx2); in commuteInstructionImpl()
|
| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
| H A D | SLPVectorizer.cpp | 1460 for (unsigned OpIdx1 = 0, NumOperands1 = I1->getNumOperands(); in getScoreAtLevelRec() local
1461 OpIdx1 != NumOperands1; ++OpIdx1) { in getScoreAtLevelRec()
1467 unsigned FromIdx = isCommutative(I2) ? 0 : OpIdx1; in getScoreAtLevelRec()
1470 : std::min(I2->getNumOperands(), OpIdx1 + 1); in getScoreAtLevelRec()
1478 getScoreAtLevelRec(I1->getOperand(OpIdx1), I2->getOperand(OpIdx2), in getScoreAtLevelRec()
1585 void swap(unsigned OpIdx1, unsigned OpIdx2, unsigned Lane) { in swap() argument
1586 std::swap(OpsVec[OpIdx1][Lane], OpsVec[OpIdx2][Lane]); in swap()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.cpp | 2261 unsigned OpIdx1, in commuteInstructionImpl() argument
2698 commuteVPTERNLOG(*WorkingMI, OpIdx1, OpIdx2); in commuteInstructionImpl()
2711 get(getFMA3OpcodeToCommuteOperands(MI, OpIdx1, OpIdx2, *FMA3Group))); in commuteInstructionImpl()
2715 return TargetInstrInfo::commuteInstructionImpl(MI, NewMI, OpIdx1, OpIdx2); in commuteInstructionImpl()
|