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Searched refs:PhysReg (Results 1 – 25 of 109) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DReachingDefAnalysis.cpp285 return hasLocalDefBefore(MI, PhysReg) in getReachingLocalMIDef()
297 return getReachingDef(A, PhysReg) == getReachingDef(B, PhysReg); in hasSameReachingDef()
327 return getReachingDef(MI, PhysReg) >= 0; in hasLocalDefBefore()
408 getLiveOuts(MBB, PhysReg, Defs); in getGlobalReachingDefs()
447 getLiveOuts(Pred, PhysReg, Incoming); in getUniqueReachingMIDef()
495 getReachingDef(MI, PhysReg) != getReachingDef(&*Last, PhysReg)) in isRegDefinedAfter()
513 int Def = getReachingDef(MI, PhysReg); in isReachingDefLiveOut()
667 getGlobalUses(Def, PhysReg, Uses); in collectKilledOperands()
689 if (isRegUsedAfter(MI, PhysReg)) { in isSafeToDefRegAt()
692 getGlobalUses(Def, PhysReg, Uses); in isSafeToDefRegAt()
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H A DLiveRegMatrix.cpp96 for (MCRegUnit Unit : TRI->regunits(PhysReg)) { in foreachUnit()
108 VRM->assignVirt2Phys(VirtReg.reg(), PhysReg); in assign()
122 Register PhysReg = VRM->getPhys(VirtReg.reg()); in unassign() local
127 foreachUnit(TRI, VirtReg, PhysReg, in unassign()
139 for (MCRegUnit Unit : TRI->regunits(PhysReg)) { in isPhysRegUsed()
161 return !RegMaskUsable.empty() && (!PhysReg || !RegMaskUsable.test(PhysReg)); in checkRegMaskInterference()
168 CoalescerPair CP(VirtReg.reg(), PhysReg, *TRI); in checkRegUnitInterference()
192 if (checkRegMaskInterference(VirtReg, PhysReg)) in checkInterference()
196 if (checkRegUnitInterference(VirtReg, PhysReg)) in checkInterference()
219 for (MCRegUnit Unit : TRI->regunits(PhysReg)) { in checkInterference()
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H A DRegAllocFast.cpp658 MCPhysReg PhysReg = LR.PhysReg; in reloadAtBegin() local
819 LR.PhysReg = PhysReg; in assignVirtToPhysReg()
927 if (PhysReg == Hint0 || PhysReg == Hint1) in allocVirtReg()
945 LR.PhysReg = 0; in allocVirtReg()
961 MCPhysReg PhysReg; in allocVirtRegUndef() local
963 PhysReg = LRI->PhysReg; in allocVirtRegUndef()
973 PhysReg = TRI->getSubReg(PhysReg, SubRegIdx); in allocVirtRegUndef()
1057 MCPhysReg PhysReg = LRI->PhysReg; in defineVirtReg() local
1226 MCPhysReg PhysReg = LR.PhysReg; in dumpState() local
1505 MCPhysReg PhysReg = LR.PhysReg; in allocateInstruction() local
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H A DRegAllocGreedy.cpp403 MCRegister PhysReg; in tryAssign() local
410 PhysReg = *I; in tryAssign()
414 return PhysReg; in tryAssign()
445 return PhysReg; in tryAssign()
1180 assert(PhysReg); in calculateRegionSplitCost()
1660 assert(PhysReg); in tryLocalSplit()
1814 return PhysReg; in trySplit()
2122 if (PhysReg == ~0u || (!PhysReg && !LI->empty())) in tryRecoloringCandidates()
2125 if (!PhysReg) { in tryRecoloringCandidates()
2207 return PhysReg; in tryAssignCSRFirstTime()
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H A DRegAllocBasic.cpp209 MCRegister PhysReg, in spillInterferences() argument
216 for (MCRegUnit Unit : TRI->regunits(PhysReg)) { in spillInterferences()
267 for (MCRegister PhysReg : Order) { in selectOrSplit() local
268 assert(PhysReg.isValid()); in selectOrSplit()
270 switch (Matrix->checkInterference(VirtReg, PhysReg)) { in selectOrSplit()
273 return PhysReg; in selectOrSplit()
277 PhysRegSpillCands.push_back(PhysReg); in selectOrSplit()
287 for (MCRegister &PhysReg : PhysRegSpillCands) { in selectOrSplit()
288 if (!spillInterferences(VirtReg, PhysReg, SplitVRegs)) in selectOrSplit()
291 assert(!Matrix->checkInterference(VirtReg, PhysReg) && in selectOrSplit()
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H A DRegisterClassInfo.cpp146 for (unsigned PhysReg : RawOrder) { in compute() local
148 if (Reserved.test(PhysReg)) in compute()
150 uint8_t Cost = RegCosts[PhysReg]; in compute()
153 if (CalleeSavedAliases[PhysReg] && in compute()
154 !STI.ignoreCSRForAllocationOrder(*MF, PhysReg)) in compute()
156 CSRAlias.push_back(PhysReg); in compute()
160 RCI.Order[N++] = PhysReg; in compute()
168 for (unsigned PhysReg : CSRAlias) { in compute() local
169 uint8_t Cost = RegCosts[PhysReg]; in compute()
172 RCI.Order[N++] = PhysReg; in compute()
H A DVirtRegMap.cpp334 MBB->addLiveIn(PhysReg, LaneMask); in addLiveInsForSubRanges()
350 Register PhysReg = VRM->getPhys(VirtReg); in addMBBLiveIns() local
351 if (PhysReg == VirtRegMap::NO_PHYS_REG) { in addMBBLiveIns()
359 addLiveInsForSubRanges(LI, PhysReg); in addMBBLiveIns()
369 MBB->addLiveIn(PhysReg); in addMBBLiveIns()
559 RewriteRegs.insert(PhysReg); in rewrite()
571 SuperKills.push_back(PhysReg); in rewrite()
578 SuperDefs.push_back(PhysReg); in rewrite()
602 PhysReg = TRI->getSubReg(PhysReg, SubReg); in rewrite()
608 MO.setReg(PhysReg); in rewrite()
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H A DRegAllocEvictionAdvisor.cpp168 const LiveInterval &VirtReg, MCRegister PhysReg, in canEvictHintInterference() argument
172 return canEvictInterferenceBasedOnCost(VirtReg, PhysReg, true, MaxCost, in canEvictHintInterference()
186 const LiveInterval &VirtReg, MCRegister PhysReg, bool IsHint, in canEvictInterferenceBasedOnCost() argument
189 if (Matrix->checkInterference(VirtReg, PhysReg) > LiveRegMatrix::IK_VirtReg) in canEvictInterferenceBasedOnCost()
204 for (MCRegUnit Unit : TRI->regunits(PhysReg)) { in canEvictInterferenceBasedOnCost()
266 (!EnableLocalReassign || !canReassign(*Intf, PhysReg))) { in canEvictInterferenceBasedOnCost()
296 MCRegister PhysReg = *I; in tryFindEvictionCandidate() local
297 assert(PhysReg); in tryFindEvictionCandidate()
298 if (!canAllocatePhysReg(CostPerUseLimit, PhysReg) || in tryFindEvictionCandidate()
299 !canEvictInterferenceBasedOnCost(VirtReg, PhysReg, false, BestCost, in tryFindEvictionCandidate()
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H A DInterferenceCache.h47 MCRegister PhysReg = 0; variable
105 PhysReg = MCRegister::NoRegister; in clear()
111 MCRegister getPhysReg() const { return PhysReg; } in getPhysReg()
155 Entry *get(MCRegister PhysReg);
209 void setPhysReg(InterferenceCache &Cache, MCRegister PhysReg) { in setPhysReg() argument
213 if (PhysReg.isValid()) in setPhysReg()
214 setEntry(Cache.get(PhysReg)); in setPhysReg()
H A DInterferenceCache.cpp63 InterferenceCache::Entry *InterferenceCache::get(MCRegister PhysReg) { in get() argument
64 unsigned char E = PhysRegEntries[PhysReg.id()]; in get()
65 if (E < CacheEntries && Entries[E].getPhysReg() == PhysReg) { in get()
81 Entries[E].reset(PhysReg, LIUArray, TRI, MF); in get()
82 PhysRegEntries[PhysReg] = E; in get()
96 for (MCRegUnit Unit : TRI->regunits(PhysReg)) in revalidate()
107 PhysReg = physReg; in reset()
113 for (MCRegUnit Unit : TRI->regunits(PhysReg)) { in reset()
122 for (MCRegUnit Unit : TRI->regunits(PhysReg)) { in valid()
195 if (MachineOperand::clobbersPhysReg(RegMaskBits[i], PhysReg)) { in update()
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H A DRegAllocGreedy.h224 MCRegister PhysReg; member
237 PhysReg = Reg; in reset()
337 bool mayRecolorAllInterferences(MCRegister PhysReg,
350 unsigned calculateRegionSplitCostAroundReg(MCPhysReg PhysReg,
370 AllocationOrder &Order, MCRegister PhysReg,
399 MCRegister PhysReg; member
401 HintInfo(BlockFrequency Freq, Register Reg, MCRegister PhysReg) in HintInfo()
402 : Freq(Freq), Reg(Reg), PhysReg(PhysReg) {} in HintInfo()
H A DMachineRegisterInfo.cpp517 bool MachineRegisterInfo::isConstantPhysReg(MCRegister PhysReg) const { in isConstantPhysReg()
518 assert(Register::isPhysicalRegister(PhysReg)); in isConstantPhysReg()
521 if (TRI->isConstantPhysReg(PhysReg)) in isConstantPhysReg()
526 for (MCRegAliasIterator AI(PhysReg, TRI, true); in isConstantPhysReg()
574 bool MachineRegisterInfo::isPhysRegModified(MCRegister PhysReg, in isPhysRegModified() argument
576 if (UsedPhysRegMask.test(PhysReg)) in isPhysRegModified()
579 for (MCRegAliasIterator AI(PhysReg, TRI, true); AI.isValid(); ++AI) { in isPhysRegModified()
589 bool MachineRegisterInfo::isPhysRegUsed(MCRegister PhysReg, in isPhysRegUsed() argument
591 if (!SkipRegMaskTest && UsedPhysRegMask.test(PhysReg)) in isPhysRegUsed()
594 for (MCRegAliasIterator AliasReg(PhysReg, TRI, true); AliasReg.isValid(); in isPhysRegUsed()
H A DLiveRangeCalc.cpp87 void LiveRangeCalc::extend(LiveRange &LR, SlotIndex Use, unsigned PhysReg, in extend() argument
105 if (findReachingDefs(LR, *UseMBB, Use, PhysReg, Undefs)) in extend()
192 SlotIndex Use, unsigned PhysReg, in findReachingDefs() argument
212 errs() << "Use of " << printReg(PhysReg, MRI->getTargetRegisterInfo()) in findReachingDefs()
220 if (Register::isPhysicalRegister(PhysReg)) { in findReachingDefs()
222 bool IsLiveIn = MBB->isLiveIn(PhysReg); in findReachingDefs()
223 for (MCRegAliasIterator Alias(PhysReg, TRI, false); !IsLiveIn && Alias.isValid(); ++Alias) in findReachingDefs()
227 errs() << "The register " << printReg(PhysReg, TRI) in findReachingDefs()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DReachingDefAnalysis.h142 int getReachingDef(MachineInstr *MI, MCRegister PhysReg) const;
146 MCRegister PhysReg) const;
155 MCRegister PhysReg) const;
160 MCRegister PhysReg) const;
176 bool isRegUsedAfter(MachineInstr *MI, MCRegister PhysReg) const;
183 int getClearance(MachineInstr *MI, MCRegister PhysReg) const;
187 void getReachingLocalUses(MachineInstr *MI, MCRegister PhysReg,
194 void getLiveOuts(MachineBasicBlock *MBB, MCRegister PhysReg,
200 bool getLiveInUses(MachineBasicBlock *MBB, MCRegister PhysReg,
239 bool isSafeToDefRegAt(MachineInstr *MI, MCRegister PhysReg,
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H A DLiveRegMatrix.h108 MCRegister PhysReg);
115 bool checkInterference(SlotIndex Start, SlotIndex End, MCRegister PhysReg);
120 void assign(const LiveInterval &VirtReg, MCRegister PhysReg);
128 bool isPhysRegUsed(MCRegister PhysReg) const;
141 MCRegister PhysReg = MCRegister::NoRegister);
147 MCRegister PhysReg);
159 Register getOneVReg(unsigned PhysReg) const;
H A DRegisterClassInfo.h118 MCRegister getLastCalleeSavedAlias(MCRegister PhysReg) const { in getLastCalleeSavedAlias() argument
119 if (PhysReg.id() < CalleeSavedAliases.size()) in getLastCalleeSavedAlias()
120 return CalleeSavedAliases[PhysReg]; in getLastCalleeSavedAlias()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIPreAllocateWWMRegs.cpp105 for (MCRegister PhysReg : RegClassInfo.getOrder(MRI->getRegClass(Reg))) { in processDef() local
106 if (!MRI->isPhysRegUsed(PhysReg, /*SkipRegMaskTest=*/true) && in processDef()
107 Matrix->checkInterference(LI, PhysReg) == LiveRegMatrix::IK_Free) { in processDef()
108 Matrix->assign(LI, PhysReg); in processDef()
109 assert(PhysReg != 0); in processDef()
132 Register PhysReg = VRM->getPhys(VirtReg); in rewriteRegs() local
135 PhysReg = TRI->getSubReg(PhysReg, SubReg); in rewriteRegs()
139 MO.setReg(PhysReg); in rewriteRegs()
150 const Register PhysReg = VRM->getPhys(Reg); in rewriteRegs() local
151 assert(PhysReg != 0); in rewriteRegs()
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/
H A DPPCCallLowering.cpp38 void assignValueToReg(Register ValVReg, Register PhysReg,
51 void OutgoingArgHandler::assignValueToReg(Register ValVReg, Register PhysReg, in assignValueToReg() argument
53 MIB.addUse(PhysReg, RegState::Implicit); in assignValueToReg()
55 MIRBuilder.buildCopy(PhysReg, ExtReg); in assignValueToReg()
146 Register PhysReg, in assignValueToReg() argument
148 markPhysRegUsed(PhysReg); in assignValueToReg()
149 IncomingValueHandler::assignValueToReg(ValVReg, PhysReg, VA); in assignValueToReg()
184 void FormalArgHandler::markPhysRegUsed(unsigned PhysReg) { in markPhysRegUsed() argument
185 MIRBuilder.getMRI()->addLiveIn(PhysReg); in markPhysRegUsed()
186 MIRBuilder.getMBB().addLiveIn(PhysReg); in markPhysRegUsed()
H A DPPCCallLowering.h48 void assignValueToReg(Register ValVReg, Register PhysReg,
59 virtual void markPhysRegUsed(unsigned PhysReg) = 0;
64 void markPhysRegUsed(unsigned PhysReg) override;
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/GISel/
H A DM68kCallLowering.cpp41 void assignValueToReg(Register ValVReg, Register PhysReg,
59 void assignValueToReg(Register ValVReg, Register PhysReg, in assignValueToReg()
61 MIB.addUse(PhysReg, RegState::Implicit); in assignValueToReg()
63 MIRBuilder.buildCopy(PhysReg, ExtReg); in assignValueToReg()
150 Register PhysReg, in assignValueToReg() argument
152 MIRBuilder.getMRI()->addLiveIn(PhysReg); in assignValueToReg()
153 MIRBuilder.getMBB().addLiveIn(PhysReg); in assignValueToReg()
154 IncomingValueHandler::assignValueToReg(ValVReg, PhysReg, VA); in assignValueToReg()
183 void CallReturnHandler::assignValueToReg(Register ValVReg, Register PhysReg, in assignValueToReg() argument
185 MIB.addDef(PhysReg, RegState::Implicit); in assignValueToReg()
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMCallLowering.cpp112 void assignValueToReg(Register ValVReg, Register PhysReg, in assignValueToReg()
121 MIRBuilder.buildCopy(PhysReg, ExtReg); in assignValueToReg()
122 MIB.addUse(PhysReg, RegState::Implicit); in assignValueToReg()
296 markPhysRegUsed(PhysReg); in assignValueToReg()
298 MIRBuilder.buildCopy(ValVReg, PhysReg); in assignValueToReg()
350 virtual void markPhysRegUsed(unsigned PhysReg) = 0;
357 void markPhysRegUsed(unsigned PhysReg) override { in markPhysRegUsed()
358 MIRBuilder.getMRI()->addLiveIn(PhysReg); in markPhysRegUsed()
359 MIRBuilder.getMBB().addLiveIn(PhysReg); in markPhysRegUsed()
430 void markPhysRegUsed(unsigned PhysReg) override { in markPhysRegUsed()
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/
H A DX86CallLowering.cpp108 void assignValueToReg(Register ValVReg, Register PhysReg, in assignValueToReg()
110 MIB.addUse(PhysReg, RegState::Implicit); in assignValueToReg()
112 MIRBuilder.buildCopy(PhysReg, ExtReg); in assignValueToReg()
214 void assignValueToReg(Register ValVReg, Register PhysReg, in assignValueToReg()
216 markPhysRegUsed(PhysReg); in assignValueToReg()
223 virtual void markPhysRegUsed(unsigned PhysReg) = 0;
233 void markPhysRegUsed(unsigned PhysReg) override { in markPhysRegUsed()
234 MIRBuilder.getMRI()->addLiveIn(PhysReg); in markPhysRegUsed()
235 MIRBuilder.getMBB().addLiveIn(PhysReg); in markPhysRegUsed()
244 void markPhysRegUsed(unsigned PhysReg) override { in markPhysRegUsed()
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/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZRegisterInfo.cpp42 Register PhysReg = VRM->getPhys(MO.getReg()); in getRC32() local
43 if (SystemZ::GR32BitRegClass.contains(PhysReg)) in getRC32()
45 assert (SystemZ::GRH32BitRegClass.contains(PhysReg) && in getRC32()
110 Register PhysReg = in getRegAllocationHints() local
112 if (PhysReg) { in getRegAllocationHints()
114 PhysReg = getSubReg(PhysReg, MO->getSubReg()); in getRegAllocationHints()
116 PhysReg = getMatchingSuperReg(PhysReg, VRRegMO->getSubReg(), in getRegAllocationHints()
118 if (!MRI->isReserved(PhysReg) && !is_contained(Hints, PhysReg)) in getRegAllocationHints()
119 TwoAddrHints.insert(PhysReg); in getRegAllocationHints()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsCallLowering.cpp95 void assignValueToReg(Register ValVReg, Register PhysReg,
109 virtual void markPhysRegUsed(unsigned PhysReg) { in markPhysRegUsed() argument
110 MIRBuilder.getMRI()->addLiveIn(PhysReg); in markPhysRegUsed()
111 MIRBuilder.getMBB().addLiveIn(PhysReg); in markPhysRegUsed()
122 void markPhysRegUsed(unsigned PhysReg) override { in markPhysRegUsed() argument
123 MIB.addDef(PhysReg, RegState::Implicit); in markPhysRegUsed()
134 markPhysRegUsed(PhysReg); in assignValueToReg()
135 IncomingValueHandler::assignValueToReg(ValVReg, PhysReg, VA); in assignValueToReg()
202 void assignValueToReg(Register ValVReg, Register PhysReg,
224 MIRBuilder.buildCopy(PhysReg, ExtReg); in assignValueToReg()
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/
H A DRISCVCallLowering.cpp100 void assignValueToReg(Register ValVReg, Register PhysReg, in assignValueToReg()
107 MIRBuilder.buildCopy(PhysReg, ExtReg); in assignValueToReg()
108 MIB.addUse(PhysReg, RegState::Implicit); in assignValueToReg()
228 void assignValueToReg(Register ValVReg, Register PhysReg, in assignValueToReg()
230 markPhysRegUsed(PhysReg); in assignValueToReg()
275 virtual void markPhysRegUsed(MCRegister PhysReg) = 0;
285 void markPhysRegUsed(MCRegister PhysReg) override { in markPhysRegUsed()
286 MIRBuilder.getMRI()->addLiveIn(PhysReg); in markPhysRegUsed()
287 MIRBuilder.getMBB().addLiveIn(PhysReg); in markPhysRegUsed()
296 void markPhysRegUsed(MCRegister PhysReg) override { in markPhysRegUsed()
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