Searched refs:RegOpnd (Results 1 – 4 of 4) sorted by relevance
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
H A D | AArch64MCCodeEmitter.cpp | 570 auto RegOpnd = MI.getOperand(OpIdx).getReg(); in EncodeRegAsMultipleOf() local 571 unsigned RegVal = Ctx.getRegisterInfo()->getEncodingValue(RegOpnd); in EncodeRegAsMultipleOf() 579 auto RegOpnd = MI.getOperand(OpIdx).getReg(); in EncodePNR_p8to15() local 580 return RegOpnd - AArch64::PN8; in EncodePNR_p8to15() 586 auto RegOpnd = MI.getOperand(OpIdx).getReg(); in EncodeZPR2StridedRegisterClass() local 587 unsigned RegVal = Ctx.getRegisterInfo()->getEncodingValue(RegOpnd); in EncodeZPR2StridedRegisterClass() 596 auto RegOpnd = MI.getOperand(OpIdx).getReg(); in EncodeZPR4StridedRegisterClass() local 597 unsigned RegVal = Ctx.getRegisterInfo()->getEncodingValue(RegOpnd); in EncodeZPR4StridedRegisterClass() 616 auto RegOpnd = MI.getOperand(OpIdx).getReg(); in encodeMatrixIndexGPR32() local 617 return RegOpnd - BaseReg; in encodeMatrixIndexGPR32()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsSEISelDAGToDAG.cpp | 806 SDNode *RegOpnd; in trySelect() local 814 RegOpnd = CurDAG->getMachineNode(Inst->Opc, DL, MVT::i64, ImmOpnd); in trySelect() 816 RegOpnd = in trySelect() 825 RegOpnd = CurDAG->getMachineNode(Inst->Opc, DL, MVT::i64, in trySelect() 826 SDValue(RegOpnd, 0), ImmOpnd); in trySelect() 829 ReplaceNode(Node, RegOpnd); in trySelect()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
H A D | MipsAsmParser.cpp | 7708 MipsOperand &RegOpnd = static_cast<MipsOperand &>(*Reg[0]); in parseDirectiveCpAdd() local 7709 if (!RegOpnd.isGPRAsmReg()) { in parseDirectiveCpAdd() 7710 reportParseError(RegOpnd.getStartLoc(), "invalid register"); in parseDirectiveCpAdd() 7721 getTargetStreamer().emitDirectiveCpAdd(RegOpnd.getGPR32Reg()); in parseDirectiveCpAdd() 7741 MipsOperand &RegOpnd = static_cast<MipsOperand &>(*Reg[0]); in parseDirectiveCpLoad() local 7742 if (!RegOpnd.isGPRAsmReg()) { in parseDirectiveCpLoad() 7743 reportParseError(RegOpnd.getStartLoc(), "invalid register"); in parseDirectiveCpLoad() 7770 MipsOperand &RegOpnd = static_cast<MipsOperand &>(*Reg[0]); in parseDirectiveCpLocal() local 7771 if (!RegOpnd.isGPRAsmReg()) { in parseDirectiveCpLocal() 7772 reportParseError(RegOpnd.getStartLoc(), "invalid register"); in parseDirectiveCpLocal() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIInstrInfo.cpp | 9168 TargetInstrInfo::RegSubRegPair getRegOrUndef(const MachineOperand &RegOpnd) { in getRegOrUndef() argument 9169 assert(RegOpnd.isReg()); in getRegOrUndef() 9170 return RegOpnd.isUndef() ? TargetInstrInfo::RegSubRegPair() : in getRegOrUndef() 9171 getRegSubRegPair(RegOpnd); in getRegOrUndef()
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