Searched refs:ShiftR (Results 1 – 5 of 5) sorted by relevance
/freebsd/contrib/llvm-project/llvm/include/llvm/Support/ |
H A D | ScaledNumber.h | 311 int32_t ShiftR = ScaleDiff - ShiftL; in matchScales() local 312 if (ShiftR >= getWidth<DigitsT>()) { in matchScales() 319 RDigits >>= ShiftR; in matchScales() 322 RScale += ShiftR; in matchScales()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelDAGToDAGHVX.cpp | 1452 int ShiftR = SMA.MinSrc; in packs() local 1453 if (ShiftR >= static_cast<int>(HwLen)) { in packs() 1456 ShiftR -= HwLen; in packs() 1458 OpRef RetVal = valign(Va, Vb, ShiftR, Ty, Results); in packs()
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCISelDAGToDAG.cpp | 3732 SDValue ShiftR = in get64BitZExtCompare() local 3739 ShiftR, ShiftL, SubtractCarry), 0); in get64BitZExtCompare() 3887 SDValue ShiftR = in get64BitSExtCompare() local 3899 ShiftR, ShiftL, SubtractCarry), 0); in get64BitSExtCompare()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | LegalizerHelper.cpp | 2228 auto ShiftR = IsShift ? RHS : MIRBuilder.buildShl(WideTy, RHS, ShiftK); in widenScalarAddSubShlSat() local 2231 {ShiftL, ShiftR}, MI.getFlags()); in widenScalarAddSubShlSat()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 26838 SDValue ShiftR = Op->getOperand(0); in SimplifyDemandedBitsForTargetNode() local 26839 if (ShiftR->getOpcode() != AArch64ISD::VLSHR) in SimplifyDemandedBitsForTargetNode() 26842 if (!ShiftL.hasOneUse() || !ShiftR.hasOneUse()) in SimplifyDemandedBitsForTargetNode() 26846 unsigned ShiftRBits = ShiftR->getConstantOperandVal(1); in SimplifyDemandedBitsForTargetNode() 26864 return TLO.CombineTo(Op, ShiftR->getOperand(0)); in SimplifyDemandedBitsForTargetNode()
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