/freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | MachineSSAUpdater.cpp | 60 VRC = RC; in Initialize() 163 VRC, MRI, TII); in GetValueInMiddleOfBlock() 201 Loc, VRC, MRI, TII); in GetValueInMiddleOfBlock() 305 Updater->VRC, Updater->MRI, in GetUndefVal() 316 Updater->VRC, Updater->MRI, in CreateEmptyPHI()
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/freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
H A D | VEInstrVec.td | 559 defm vv : RVmm<opcStr, ", $vy, $vz", opc, VRC, RCM, (ins VRC:$vy, VRC:$vz)>; 561 defm rv : RVmm<opcStr, ", $sy, $vz", opc, VRC, RCM, (ins RC:$sy, VRC:$vz)>; 571 defm vv : RVmm<opcStr, ", $vy, $vz", opc, VRC, RCM, (ins VRC:$vy, VRC:$vz)>; 666 (ins VRC:$vy, VRC:$vz, VRC:$vw)>; 669 (ins VRC:$vy, RC:$sy, VRC:$vw)>; 672 (ins VRC:$vy, SIMM:$sy, VRC:$vw)>; 675 (ins RC:$sy, VRC:$vz, VRC:$vw)>; 678 (ins SIMM:$sy, VRC:$vz, VRC:$vw)>; 715 defm vr : RVIlm<opcStr, ", $vy, $sy", opc, VRC, (ins VRC:$vy, RC:$sy)>; 726 (ins VRC:$vy, VRC:$vz, RC:$sy)>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/toshiba/ |
H A D | tmpv7708-visrobo-vrc.dtsi | 3 * Device Tree File for TMPV7708 VisROBO VRC SoM
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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | MachineSSAUpdater.h | 44 const TargetRegisterClass *VRC = nullptr; variable
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIRegisterInfo.h | 259 getEquivalentSGPRClass(const TargetRegisterClass *VRC) const;
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H A D | SIInstrInfo.cpp | 5518 Register Reg = MRI.createVirtualRegister(VRC); in legalizeOpWithMove() 5948 if (RI.hasAGPRs(VRC)) { in readlaneVGPRToSGPR() 5949 VRC = RI.getEquivalentVGPRClass(VRC); in readlaneVGPRToSGPR() 6474 VRC = OpRC; in legalizeOperands() 6484 if (!VRC) { in legalizeOperands() 6487 VRC = &AMDGPU::VReg_1RegClass; in legalizeOperands() 6493 VRC = RI.isAGPRClass(getOpRegClass(MI, 0)) in legalizeOperands() 6494 ? RI.getEquivalentAGPRClass(VRC) in legalizeOperands() 6495 : RI.getEquivalentVGPRClass(VRC); in legalizeOperands() 6497 RC = VRC; in legalizeOperands() [all …]
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H A D | SIRegisterInfo.cpp | 2874 const TargetRegisterClass *VRC = getVGPRClassForBitWidth(Size); in getEquivalentVGPRClass() local 2875 assert(VRC && "Invalid register class size"); in getEquivalentVGPRClass() 2876 return VRC; in getEquivalentVGPRClass() 2888 SIRegisterInfo::getEquivalentSGPRClass(const TargetRegisterClass *VRC) const { in getEquivalentSGPRClass() 2889 unsigned Size = getRegSizeInBits(*VRC); in getEquivalentSGPRClass()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | InstrEmitter.cpp | 451 const TargetRegisterClass *VRC = MRI->getRegClass(VReg); in ConstrainForSubReg() local 452 const TargetRegisterClass *RC = TRI->getSubClassWithSubReg(VRC, SubIdx); in ConstrainForSubReg() 456 if (RC && RC != VRC) in ConstrainForSubReg()
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVInstrInfoV.td | 311 class VWholeLoad<bits<3> nf, RISCVWidth width, string opcodestr, RegisterClass VRC> 313 width.Value{2-0}, (outs VRC:$vd), (ins GPRMemZeroOffset:$rs1), 382 class VWholeStore<bits<3> nf, string opcodestr, RegisterClass VRC> 384 0b000, (outs), (ins VRC:$vs3, GPRMemZeroOffset:$rs1), 1021 multiclass VWholeLoadN<int l, bits<3> nf, string opcodestr, RegisterClass VRC> { 1025 def E # l # _V : VWholeLoad<nf, w, opcodestr # "e" # l # ".v", VRC>,
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/freebsd/share/misc/ |
H A D | usb_vendors | 8272 9881 IR receiver [VRC-1100 Vista MCE Remote Control] 22598 2012 Virtual Reality Controller [VRC]
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