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Searched refs:def_instr_end (Results 1 – 6 of 6) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64AdvSIMDScalarPass.cpp211 assert(std::next(Def) == MRI->def_instr_end() && "Multiple def in SSA!"); in isProfitableToTransform()
224 assert(std::next(Def) == MRI->def_instr_end() && "Multiple def in SSA!"); in isProfitableToTransform()
304 assert(std::next(Def) == MRI->def_instr_end() && "Multiple def in SSA!"); in transformInstruction()
323 assert(std::next(Def) == MRI->def_instr_end() && "Multiple def in SSA!"); in transformInstruction()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DMachineRegisterInfo.cpp401 assert((I.atEnd() || std::next(I) == def_instr_end()) && in getVRegDef()
412 if (std::next(I) != def_instr_end()) in getUniqueVRegDef()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DMachineRegisterInfo.h424 static def_instr_iterator def_instr_end() { in def_instr_end() function
430 return make_range(def_instr_begin(Reg), def_instr_end()); in def_instructions()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600OptimizeVectorRegisters.cpp334 It = MRI->def_instr_begin(Reg), E = MRI->def_instr_end(); in runOnMachineFunction()
H A DSIMachineScheduler.cpp295 UE = MRI->def_instr_end(); UI != UE; ++UI) { in isDefBetween()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrInfo.cpp764 E = MRI.def_instr_end(); in regIsPICBase()