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/freebsd/sys/contrib/device-tree/Bindings/nvmem/
H A Dmediatek,efuse.yaml7 title: MediaTek efuse
23 pattern: "^efuse@[0-9a-f]+$"
29 - mediatek,mt7622-efuse
30 - mediatek,mt7623-efuse
31 - mediatek,mt7986-efuse
32 - mediatek,mt8173-efuse
33 - mediatek,mt8183-efuse
39 - const: mediatek,efuse
40 - const: mediatek,mt8173-efuse
54 efuse@11c10000 {
[all …]
H A Dmtk-efuse.txt7 "mediatek,mt7622-efuse", "mediatek,efuse": for MT7622
8 "mediatek,mt7623-efuse", "mediatek,efuse": for MT7623
9 "mediatek,mt8173-efuse" or "mediatek,efuse": for MT8173
10 "mediatek,mt8192-efuse", "mediatek,efuse": for MT8192
11 "mediatek,mt8195-efuse", "mediatek,efuse": for MT8195
12 "mediatek,mt8516-efuse", "mediatek,efuse": for MT8516
22 efuse: efuse@10206000 {
23 compatible = "mediatek,mt8173-efuse";
H A Drockchip-efuse.yaml19 - rockchip,rk3066a-efuse
20 - rockchip,rk3188-efuse
21 - rockchip,rk3228-efuse
22 - rockchip,rk3288-efuse
23 - rockchip,rk3328-efuse
24 - rockchip,rk3368-efuse
25 - rockchip,rk3399-efuse
28 - rockchip,rockchip-efuse
43 rockchip,efuse-size:
60 efuse: efuse@ffb40000 {
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H A Damlogic-meson-mx-efuse.txt1 Amlogic Meson6/Meson8/Meson8b efuse
5 - "amlogic,meson6-efuse"
6 - "amlogic,meson8-efuse"
7 - "amlogic,meson8b-efuse"
8 - reg: base address and size of the efuse registers
9 - clocks: a reference to the efuse core gate clock
17 efuse: nvmem@0 {
18 compatible = "amlogic,meson8-efuse";
H A Dsc27xx-efuse.txt5 "sprd,sc2720-efuse"
6 "sprd,sc2721-efuse"
7 "sprd,sc2723-efuse"
8 "sprd,sc2730-efuse"
9 "sprd,sc2731-efuse"
10 - reg: Specify the address offset of efuse controller.
29 efuse@380 {
30 compatible = "sprd,sc2731-efuse";
H A Damlogic,meson6-efuse.yaml4 $id: http://devicetree.org/schemas/nvmem/amlogic,meson6-efuse.yaml#
20 - amlogic,meson6-efuse
21 - amlogic,meson8-efuse
22 - amlogic,meson8b-efuse
43 efuse: efuse@0 {
44 compatible = "amlogic,meson6-efuse";
H A Damlogic,meson-gxbb-efuse.yaml4 $id: http://devicetree.org/schemas/nvmem/amlogic,meson-gxbb-efuse.yaml#
19 - const: amlogic,meson-gxbb-efuse
21 - const: amlogic,meson-gx-efuse
22 - const: amlogic,meson-gxbb-efuse
40 efuse: efuse {
41 compatible = "amlogic,meson-gxbb-efuse";
H A Duniphier-efuse.txt6 - compatible: should be "socionext,uniphier-efuse"
10 Are child nodes of efuse, bindings of which as described in
22 efuse@100 {
23 compatible = "socionext,uniphier-efuse";
27 efuse@200 {
28 compatible = "socionext,uniphier-efuse";
H A Dsocionext,uniphier-efuse.yaml4 $id: http://devicetree.org/schemas/nvmem/socionext,uniphier-efuse.yaml#
19 const: socionext,uniphier-efuse
32 efuse@100 {
33 compatible = "socionext,uniphier-efuse";
37 efuse@200 {
38 compatible = "socionext,uniphier-efuse";
H A Dingenic,jz4780-efuse.yaml4 $id: http://devicetree.org/schemas/nvmem/ingenic,jz4780-efuse.yaml#
18 - ingenic,jz4780-efuse
24 # Handle for the ahb for the efuse.
38 efuse@134100d0 {
39 compatible = "ingenic,jz4780-efuse";
H A Damlogic-efuse.txt4 - compatible: should be "amlogic,meson-gxbb-efuse"
5 - clocks: phandle to the efuse peripheral clock provided by the
15 efuse: efuse {
16 compatible = "amlogic,meson-gxbb-efuse";
H A Dsprd-efuse.txt4 - compatible: Should be "sprd,ums312-efuse".
5 - reg: Specify the address offset of efuse controller.
16 ap_efuse: efuse@32240000 {
17 compatible = "sprd,ums312-efuse";
/freebsd/sys/contrib/device-tree/Bindings/fuse/
H A Dnvidia,tegra20-fuse.yaml17 - nvidia,tegra20-efuse
18 - nvidia,tegra30-efuse
19 - nvidia,tegra114-efuse
20 - nvidia,tegra124-efuse
21 - nvidia,tegra210-efuse
22 - nvidia,tegra186-efuse
23 - nvidia,tegra194-efuse
24 - nvidia,tegra234-efuse
66 - nvidia,tegra20-efuse
67 - nvidia,tegra30-efuse
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H A Dnvidia,tegra20-fuse.txt4 - compatible : For Tegra20, must contain "nvidia,tegra20-efuse". For Tegra30,
5 must contain "nvidia,tegra30-efuse". For Tegra114, must contain
6 "nvidia,tegra114-efuse". For Tegra124, must contain "nvidia,tegra124-efuse".
7 For Tegra132 must contain "nvidia,tegra132-efuse", "nvidia,tegra124-efuse".
8 For Tegra210 must contain "nvidia,tegra210-efuse". For Tegra186 must contain
9 "nvidia,tegra186-efuse". For Tegra194 must contain "nvidia,tegra194-efuse".
10 For Tegra234 must contain "nvidia,tegra234-efuse".
12 nvidia,tegra20-efuse: Tegra20 requires using APB DMA to read the fuse data
15 nvidia,tegra30-efuse, nvidia,tegra114-efuse and nvidia,tegra124-efuse:
16 The differences between these SoCs are the size of the efuse array,
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/freebsd/sys/contrib/device-tree/Bindings/regulator/
H A Dti-abb-regulator.txt35 efuse: (see Optional properties)
47 - "efuse-address" - Contains efuse base address used to pick up ABB info.
49 "efuse-address" is required for this.
55 efuse: Mandatory if 'efuse-address' register is defined. Provides offset
57 'efuse-address' is not defined.
58 RBB enable efuse Mask: Optional if 'efuse-address' register is defined.
61 FBB enable efuse Mask: Optional if 'efuse-address' register is defined.
81 /* uV ABB efuse rbb_m fbb_m vset_m */
101 /* uV ABB efuse rbb_m fbb_m vset_m */
118 "efuse-address", "ldo-address";
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/freebsd/sys/contrib/dev/mediatek/mt76/mt7603/
H A Deeprom.c67 mt7603_has_cal_free_data(struct mt7603_dev *dev, u8 *efuse) in mt7603_has_cal_free_data() argument
69 if (!efuse[MT_EE_TEMP_SENSOR_CAL]) in mt7603_has_cal_free_data()
72 if (get_unaligned_le16(efuse + MT_EE_TX_POWER_0_START_2G) == 0) in mt7603_has_cal_free_data()
75 if (get_unaligned_le16(efuse + MT_EE_TX_POWER_1_START_2G) == 0) in mt7603_has_cal_free_data()
78 if (!efuse[MT_EE_CP_FT_VERSION]) in mt7603_has_cal_free_data()
81 if (!efuse[MT_EE_XTAL_FREQ_OFFSET]) in mt7603_has_cal_free_data()
84 if (!efuse[MT_EE_XTAL_WF_RFCAL]) in mt7603_has_cal_free_data()
91 mt7603_apply_cal_free_data(struct mt7603_dev *dev, u8 *efuse) in mt7603_apply_cal_free_data() argument
112 if (!mt7603_has_cal_free_data(dev, efuse)) in mt7603_apply_cal_free_data()
121 eeprom[offset] = efuse[offset]; in mt7603_apply_cal_free_data()
/freebsd/sys/contrib/dev/rtw88/
H A Dmain.c1211 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw_update_sta_info() local
1563 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw_init_ht_cap() local
1599 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw_init_vht_cap() local
1844 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw_chip_parameter_setup() local
1936 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw_dump_hw_feature() local
1968 efuse->hw_cap.hci, efuse->hw_cap.bw, efuse->hw_cap.ptcl, in rtw_dump_hw_feature()
1969 efuse->hw_cap.ant_num, efuse->hw_cap.nss); in rtw_dump_hw_feature()
1982 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw_chip_efuse_info_setup() local
2027 efuse->btcoex = (efuse->rf_board_option & 0xe0) == 0x20; in rtw_chip_efuse_info_setup()
2028 efuse->ext_pa_2g = efuse->pa_type_2g & BIT(4) ? 1 : 0; in rtw_chip_efuse_info_setup()
[all …]
H A Defuse.c43 u32 physical_size = rtwdev->efuse.physical_size; in rtw_dump_logical_efuse_map()
44 u32 protect_size = rtwdev->efuse.protect_size; in rtw_dump_logical_efuse_map()
45 u32 logical_size = rtwdev->efuse.logical_size; in rtw_dump_logical_efuse_map()
90 u32 size = rtwdev->efuse.physical_size; in rtw_dump_physical_efuse_map()
149 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw_parse_efuse_map() local
150 u32 phy_size = efuse->physical_size; in rtw_parse_efuse_map()
151 u32 log_size = efuse->logical_size; in rtw_parse_efuse_map()
H A Drtw8821c.c51 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw8821c_read_efuse() local
59 efuse->crystal_cap = map->xtal_k; in rtw8821c_read_efuse()
60 efuse->pa_type_2g = map->pa_type; in rtw8821c_read_efuse()
61 efuse->pa_type_5g = map->pa_type; in rtw8821c_read_efuse()
76 switch (efuse->rfe_option) { in rtw8821c_read_efuse()
90 if (rtwdev->efuse.rfe_option == 2 || rtwdev->efuse.rfe_option == 4) in rtw8821c_read_efuse()
489 struct rtw_efuse efuse = rtwdev->efuse; in rtw8821c_get_bb_swing() local
521 struct rtw_efuse *efuse = &rtwdev->efuse; in get_cck_rx_pwr() local
921 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw8821c_coex_cfg_rfe_type() local
963 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw8821c_coex_cfg_wl_tx_power() local
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H A Dcoex.c117 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw_coex_freerun_check() local
809 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw_coex_update_wl_ch_info() local
984 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw_btc_wltoggle_table_a() local
1070 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw_coex_table() local
1199 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw_coex_tdma() local
1529 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw_coex_action_coex_all_off() local
1555 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw_coex_action_freerun() local
1597 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw_coex_action_rf4ce() local
1622 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw_coex_action_bt_whql_test() local
1649 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw_coex_action_bt_relink() local
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H A Drtw8822b.c43 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw8822b_read_efuse() local
51 efuse->crystal_cap = map->xtal_k; in rtw8822b_read_efuse()
52 efuse->pa_type_2g = map->pa_type; in rtw8822b_read_efuse()
53 efuse->pa_type_5g = map->pa_type; in rtw8822b_read_efuse()
424 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw8822b_set_channel_cca() local
613 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw8822b_set_channel_bb() local
719 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw8822b_set_channel() local
740 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw8822b_config_trx_mode() local
1262 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw8822b_coex_cfg_rfe_type() local
1285 if (efuse->share_ant && in rtw8822b_coex_cfg_rfe_type()
[all …]
/freebsd/sys/contrib/dev/mediatek/mt76/mt76x2/
H A Deeprom.c26 u16 *efuse_w = (u16 *)efuse; in mt76x2_has_cal_free_data()
94 if (!mt76x2_has_cal_free_data(dev, efuse)) in mt76x2_apply_cal_free_data()
100 eeprom[offset] = efuse[offset]; in mt76x2_apply_cal_free_data()
103 if (!(efuse[MT_EE_TX_POWER_0_START_5G] | in mt76x2_apply_cal_free_data()
104 efuse[MT_EE_TX_POWER_0_START_5G + 1])) in mt76x2_apply_cal_free_data()
106 if (!(efuse[MT_EE_TX_POWER_1_START_5G] | in mt76x2_apply_cal_free_data()
107 efuse[MT_EE_TX_POWER_1_START_5G + 1])) in mt76x2_apply_cal_free_data()
118 val = get_unaligned_le16(efuse + MT_EE_BT_PMUCFG); in mt76x2_apply_cal_free_data()
143 void *efuse; in mt76x2_eeprom_load() local
161 efuse = dev->mt76.otp.data; in mt76x2_eeprom_load()
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/freebsd/sys/contrib/device-tree/Bindings/opp/
H A Dti-omap5-opp-supply.txt26 "ti,omap5-opp-supply" - OMAP5+ optimized voltages in efuse(class0)VDD
28 "ti,omap5-core-opp-supply" - OMAP5+ optimized voltages in efuse(class0) VDD
30 - reg: Address and length of the efuse register set for the device (mandatory
32 - ti,efuse-settings: An array of u32 tuple items providing information about
33 optimized efuse configuration. Each item consists of the following:
35 efuse_offseet: efuse offset from reg where the optimized voltage is stored.
56 ti,efuse-settings = <
H A Dti,omap-opp-supply.yaml37 - description: OMAP5+ optimized voltages in efuse(Class 0) VDD along with
40 - description: OMAP5+ optimized voltages in efuse(class0) VDD but no VBB
52 ti,efuse-settings:
54 optimized efuse configuration.
63 - description: efuse offset where the optimized voltage is located
81 - ti,efuse-settings
95 ti,efuse-settings =
/freebsd/sys/contrib/device-tree/Bindings/edac/
H A Dapm-xgene-edac.txt18 - regmap-efuse : Regmap of the PMD efuse resource.
66 efuse: efuse@1054a000 {
67 compatible = "apm,xgene-efuse", "syscon";
84 regmap-efuse = <&efuse>;

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